4

4Mb Smart 3 Boot Block Flash Memory

Micron Technology, Inc., reserves the right to change products or specifications without notice.

F45_3.p65 – Rev. 3, Pub. 12/01

©2001, Micron Technology, Inc.

4Mb

SMART 3 BOOT BLOCK FLASH MEMORY

PIN DESCRIPTIONS

44-PIN SOP 40-PIN TSOP 48-PIN TSOP

NUMBERS

NUMBERS

NUMBERS

SYMBOL

TYPE

DESCRIPTION

43

9

11

WE#

Input

Write Enable: Determines if a given cycle is a WRITE

cycle. If WE# is LOW, the cycle is either a WRITE to the

command execution logic (CEL) or to the memory array.

2

12

14

WP#

Input

WRITE or ERASE. Does not affect WRITE or ERASE

operation on other blocks.

12

22

26

CE#

Input

Chip Enable: Activates the device when LOW. When

CE# is HIGH, the device is disabled and goes into

standby power mode.

44

10

12

RP#

Input

Reset/Power-Down: When LOW, RP# clears the status

register, sets the internal state machine (ISM) to the

array read mode and places the device in deep power-

down mode. All inputs, including CE#, are “Don’t

Care,” and all outputs are High-Z. RP# unlocks the boot

of operation.

14

24

28

OE#

Input

Output Enable: Enables data output buffers when

LOW. When OE# is HIGH, the output buffers are

disabled.

33

–

47

BYTE#

Input

Byte Enable: If BYTE# = HIGH, the upper byte is active

through DQ8–DQ15. If BYTE# = LOW, DQ8–DQ14 are

High-Z, and all data is accessed through DQ0–DQ7.

DQ15/(A-1) becomes the least significant address input.

11, 10, 9, 8, 21, 20, 19,

25, 24, 23,

A0–A17/

Input

Address Inputs: Select a unique, 16-bit word or 8-bit

7, 6, 5, 4,

18, 17, 16,

22, 21, 20,

(A18)

byte. The DQ15/(A-1) input becomes the lowest order

42, 41, 40, 15, 14, 8, 7, 19, 18, 8, 7,

address when BYTE# = LOW (MT28F400B3) to allow for

39, 38, 37, 36, 6, 5, 4, 3, 6, 5, 4, 3, 2,

a selection of an 8-bit byte from the 524,288 available.

36, 35, 34, 3 2, 1, 40, 13

1, 48, 17

31

–

45

DQ15/

Input/ Data I/O: MSB of data when BYTE# = HIGH. Address

(A-1)

Output Input: LSB of address input when BYTE# = LOW during

READ or WRITE operation.

21, 24, 26,

35, 38, 40,

Output or data input pins during a WRITE. These pins are used

28, 30

42, 44

to inputcommands to the CEL.

16, 18, 20,

–

22, 25, 27,

36, 39, 41,

Output or data input pins during a WRITE when BYTE# = HIGH.

29

43

These pins are High-Z when BYTE# is LOW.

111

13

Supply Write/Erase Supply Voltage: From a WRITE or ERASE

during all other operations.

23

30, 31

37

Supply Power Supply: +3.3V ±0.3V.

13, 32

23, 39

27, 46

Supply Ground.

–

29, 37, 38 9, 10, 15, 16

NC

–

No Connect: These pins may be driven or left

unconnected.