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TPS59650 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS59650 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 51 page TPS51650, TPS59650 SLUSAV7 – JANUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS over recommended free-air temperature range, VV5 = VV5DRV = 5.0 V; VV3R3 = 3.3 V; VxGFB = VPGND = VGND, VxVFB = VCORE (Unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY: CURRENTS, UVLO AND POWER-ON RESET IV5+ IV5DRV , VVDAC < VxVFB < (VVDAC + 100 mV), V5 supply current CPU: 3-phase IV5-5 7.5 11.0 mA active GPU: 2-phase active VR_ON = ‘HI’ IV5+ IV5DRV, VVDAC < VxVFB < (VVDAC + 100 mV), V5 supply current CPU: 3-phase IV5-3 5.5 mA active GPU: OFF VR_ON = ‘HI’, VGCSP2= 3.3 V IV5+ IV5DRV, VVDAC < VxVFB < (VVDAC + 100 mV), V5 supply current CPU: 3-phase IV5-PS3 5.5 mA active GPU: 2-phase active(1) VR_ON = ‘HI’, SetPS = PS3 IV5STBY V5DRV standby current VR_ON = ‘LO’, IV5 + IV5DRV 10 20 µA VUVLOH V5 UVLO 'OK' Threshold Ramp up, VR_ON= ’HI’, 4.25 4.35 4.50 V VUVLOL V5 UVLO fault threshold Ramp down, VR_ON = ’HI’, 3.95 4.10 4.30 V V5 Power-ON Reset fault VPORV5 1.2 1.9 2.5 V latch(2) IV3R3 V3R3 supply current SVID bus idle, VR_ON = ‘HI’ 0.5 1.0 mA IV3R3SBY V3R3 standby current VR_ON = ‘LO’ 10 µA V3UVLOH V3R3 UVLO 'OK' threshold Ramp up, VR_ON= ’HI’, 2.5 2.9 3.0 V V3UVLOL V3R3 UVLO fault threshold Ramp down, VR_ON = ’HI’, 2.4 2.7 2.8 V VPORV3R3 V3R3 Power-ON Reset fault 1.2 1.9 2.5 V latch(2) REFERENCES: DAC, VREF, VBOOT AND DRVL DISCHARGE FOR BOTH CPU AND GPU VVIDSTP VID step size Change VID0 HI to LO to HI 5 mV 0.25 ≤ VxVFB ≤ 0.595V, TPS51650 –6 6 IxPU_CORE = 0 A, 0°C ≤ TA ≤ 85°C 0.25 ≤ VxVFB ≤ 0.595V, IxPU_CORE = 0 A, TPS59650 –7.5 7.5 –40°C ≤ TA ≤ 105°C VDAC1 xVFB tolerance 0.6 ≤ VxVFB ≤ 0.995V, TPS51650 –5 5 IxPU_CORE = 0 A, 0°C ≤ TA ≤ 85°C mV 0.6 ≤ VxVFB ≤ 0.995V, IxPU_CORE = 0 A, TPS59650 –7.5 7.5 –40°C ≤ TA ≤ 105°C 1.000V ≤ VxVFB ≤ 1.520 V, TPS51650 –0.5% 0.5% IxPU_CORE = 0 A, 0°C ≤ TA ≤ 85°C VDAC2 xVFB tolerance 1.000V ≤ VxVFB ≤ 1.520 V, IxPU_CORE = 0 A, TPS59650 –0.75% 0.75% –40°C ≤ TA ≤ 105°C VVREF VREF Output 4.5 V ≤ VV5 ≤ 5.5 V, IVREF= 0 A 1.655 1.700 1.745 V VVREFSRC VREF output source 0 µA ≤ IVREF ≤ 500 µA –4 –0.1 mV VVREFSNK VREF output sink –500 µA ≤ IVREF ≤ 0 µA 0.1 4 mV VDLDQ DRVL discharge threshold Soft-stop transistor turns on at this point. 200 300 mV VOLTAGE SENSE: xVFB AND xGFB FOR BOTH CPU AND GPU IxVFB xVFB input bias current VxVFB= 2 V, VxGFB= 0 V 20 40 µA IxGFB xGFB input bias current VxVFB= 2 V, VxGFB= 0 V -40 -20 µA AGAINGND xGFB/GND gain 1 V/V (1) 3-phase CPU goes to 1-phase in PS3 2-phase GPU goes to 1-phase in PS3 (2) Specified by design. Not production tested. 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated |
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