TPS54388-Q1

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SLVSAF1D – OCTOBER 2010 – REVISED APRIL 2015

8 Detailed Description

8.1 Overview

The TPS54388-Q1 device is a 6-V, 3-A, synchronous step-down (buck) converter with two integrated n-channel

MOSFETs. To improve performance during line and load transients, the device implements a constant-

frequency, peak-current-mode control, which reduces output capacitance and simplifies external frequency-

compensation design. The wide switching-frequency range of 200 kHz to 2000 kHz allows for efficiency and size

optimization when selecting the output-filter components. A resistor to ground on the RT/CLK pin sets the

switching frequency. The device has an internal phase-lock loop (PLL) on the RT/CLK pin that synchronizes the

power-switch turnon to a falling edge of an external system clock.

The TPS54388-Q1 device has a typical default start-up voltage of 2.45 V. The EN pin has an internal pullup

current source that one can use to adjust the input-voltage undervoltage lockout (UVLO) with two external

resistors. In addition, the pullup current provides a default condition, allowing the device to operate when the EN

pin is floating. The total operating current for the TPS54388-Q1 device is typically 515

μA when not switching

and under no load. With the device disabled, the supply current is typically 5.5

μA.

The integrated 12-m

Ω MOSFETs allow for high-efficiency power-supply designs with continuous output currents

up to 3 A.

The TPS54388-Q1 device reduces the external component count by integrating the boot recharge diode. A

capacitor between the BOOT and PH pins supplies the bias voltage for the integrated high-side MOSFET. A

UVLO circuit monitors the boot-capacitor voltage and turns off the high-side MOSFET when the voltage falls

below a preset threshold. This BOOT circuit allows the TPS54388-Q1 device to operate approaching 100% duty

cycle. The lower limit for stepping down the output voltage is the 0.8-V reference.

The TPS54388-Q1 device has a power-good comparator (PWRGD) with 2% hysteresis.

The TPS54388-Q1 device minimizes excessive output overvoltage transients by taking advantage of the

overvoltage power-good comparator. A regulated output voltage exceeding 109% of the nominal voltage

activates the overvoltage comparator, turning off the high-side MOSFET and masking it from turning on until the

output voltage is lower than 107% of the nominal voltage.

A use of the SS/TR (slow start pr tracking) pin is to minimize inrush currents or provide power-supply sequencing

during power up. Couple a small-value capacitor to the pin for slow start. Discharging the SS/TR pin before the

output powers up ensures a repeatable restart after an overtemperature fault, UVLO fault, or disabled condition.

The use of a frequency foldback circuit reduces the switching frequency during start-up and overcurrent fault

conditions to help limit the inductor current.

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