TPS783xx

GND

EN

IN

OUT

V

IN

V

OUT

2.2

F

m

1

F

m

On

Off

TPS783

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SBVS133A – FEBRUARY 2010 – REVISED NOVEMBER 2014

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS783 family of LDOs is factory-programmable to have a fixed output. Note that during startup or steady-

8.2 Typical Application

Figure 19. Providing a Low-Power Standby Rail

8.2.1 Design Requirements

8.2.1.1 Input and Output Capacitor Requirements

A 0.1-

μF input capacitor is necessary for stable operation. Good analog design practice is to connect a 0.1-μF to

1.0-

μF, low equivalent series resistance (ESR) capacitor across the input supply near the regulator. This

capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple

rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if

the device is not located near the power source.

The TPS783 family is designed to be stable with standard ceramic capacitors with values of 1.0

μF or larger at

the output. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over

temperature. Maximum ESR must be less than 1.0

Ω. With tolerance and dc bias effects, the minimum

capacitance for stable operation is 1

μF.

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