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PIC17C752T Datasheet(PDF) 9 Page - Microchip Technology |
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PIC17C752T Datasheet(HTML) 9 Page - Microchip Technology |
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9 / 328 page  © 1998 Microchip Technology Inc. DS30289A-page 9 PIC17C7XX 3.0 ARCHITECTURAL OVERVIEW The high performance of the PIC17CXXX can be attrib- uted to a number of architectural features commonly found in RISC microprocessors. To begin with, the PIC17CXXX uses a modified Harvard architecture. This architecture has the program and data accessed from separate memories. So, the device has a program memory bus and a data memory bus. This improves bandwidth over traditional von Neumann architecture, where program and data are fetched from the same memory (accesses over the same bus). Separating program and data memory further allows instructions to be sized differently than the 8-bit wide data word. PIC17CXXX opcodes are 16-bits wide, enabling single word instructions. The full 16-bit wide program mem- ory bus fetches a 16-bit instruction in a single cycle. A two-stage pipeline overlaps fetch and execution of instructions. Consequently, all instructions execute in a single cycle (121 ns @ 33 MHz), except for program branches and two special instructions that transfer data between program and data memory. The PIC17CXXX can address up to 64K x 16 of pro- gram memory space. The PIC17C752 and PIC17C762 integrate 8K x 16 of EPROM program memory on-chip. The PIC17C756A and PIC17C766 integrate 16K x 16 EPROM program memory on-chip. A simplified block diagram is shown in Figure 3-1. The descriptions of the device pins are listed in Table 3-1. Program execution can be internal only (microcontrol- ler or protected microcontroller mode), external only (microprocessor mode) or both (extended microcon- troller mode). Extended microcontroller mode does not allow code protection. The PIC17CXXX can directly or indirectly address its register files or data memory. All special function reg- isters, including the Program Counter (PC) and Work- ing Register (WREG), are mapped in data memory. The PIC17CXXX has an orthogonal (symmetrical) instruction set that makes it possible to carry out any operation on any register using any addressing mode. This symmetrical nature and lack of ‘special optimal sit- uations’ make programming with the PIC17CXXX sim- ple yet efficient. In addition, the learning curve is reduced significantly. One of the PIC17CXXX family architectural enhance- ments from the PIC16CXX family allows two file regis- ters to be used in some two operand instructions. This allows data to be moved directly between two registers without going through the WREG register. Thus increasing performance and decreasing program memory usage. The PIC17CXXX devices contain an 8-bit ALU and working register. The ALU is a general purpose arith- metic unit. It performs arithmetic and Boolean func- tions between data in the working register and any register file. The WREG register is an 8-bit working register used for ALU operations. All PIC17CXXX devices have an 8 x 8 hardware multi- plier. This multiplier generates a 16-bit result in a single cycle. The ALU is 8-bits wide and capable of addition, sub- traction, shift, and logical operations. Unless otherwise mentioned, arithmetic operations are two's comple- ment in nature. Depending on the instruction executed, the ALU may affect the values of the Carry (C), Digit Carry (DC), Zero (Z) and overflow (OV) bits in the ALUSTA register. The C and DC bits operate as a borrow and digit borrow out bit, respectively, in subtraction. See the SUBLW and SUBWF instructions for examples. Signed arithmetic is comprised of a magnitude and a sign bit. The overflow bit indicates if the magnitude overflows and causes the sign bit to change state. That is if the result of 8-bit signed operations is greater than 127 (7Fh) or less than -128 (80h). Signed math can have greater than 7-bit values (mag- nitude), if more than one byte is used. The overflow bit only operates on bit6 (MSb of magnitude) and bit7 (sign bit) of each byte value in the ALU. That is, the overflow bit is not useful if trying to implement signed math where the magnitude, for example, is 11-bits. If the signed math values are greater than 7-bits (such as 15-, 24- or 31-bit), the algorithm must ensure that the low order bytes of the signed value ignore the over- flow status bit. Example 3-1 shows an two cases of doing signed arith- metic. The Carry (C) bit and the Overflow (OV) bit are the most important status bits for signed math opera- tions. EXAMPLE 3-1: 8-BIT MATH ADDITION Hex Value Signed Values Unsigned Values FFh + 01h = 00h C bit = 1 OV bit = 0 DC bit = 1 Z bit = 1 -1 + 1 = 0 (FEh) C bit = 1 OV bit = 0 DC bit = 1 Z bit = 1 255 + 1 = 256 → 00h C bit = 1 OV bit = 0 DC bit = 1 Z bit = 1 Hex Value Signed Values Unsigned Values 7Fh + 01h = 80h C bit = 0 OV bit = 1 DC bit = 1 Z bit = 0 127 + 1 = 128 → 00h C bit = 0 OV bit = 1 DC bit = 1 Z bit = 0 127 + 1 = 128 C bit = 0 OV bit = 1 DC bit = 1 Z bit = 0 |
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