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37LV128 Datasheet(PDF) 5 Page - Microchip Technology |
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37LV128 Datasheet(HTML) 5 Page - Microchip Technology |
5 / 12 page © 1996 Microchip Technology Inc. DS21109E-page 5 37LV36/65/128 FIGURE 11-2: READ CHARACTERISTICS AT END OF ARRAY TIMING TABLE 11-2: READ CHARACTERISTICS AT END OF ARRAY AC Testing Waveform: VIL = 0.2V; VIH = 3.0V AC Test Load: 50 pF VOL = VOL_MAX; VOH = VOH_MIN Symbol Parameter Limits 3.0V ≤ Vcc ≤ 6.0V Limits 4.5V ≤ Vcc ≤ 6.0V Units Conditions Min. Max. Min. Max. TCDF CLK to Data Float Delay — 50 — 50 ns Notes 1, 2 TOCK CLK to CEO Delay — 65 — 40 ns TOCE CE to CEO Delay — 45 — 40 ns TOOE RESET/OE to CEO Delay — 45 — 40 ns Note 1: This parameter is periodically sampled and not 100% tested. 2: Float delays are measured with output pulled through 1k Ω to VLOAD = VCC/2. RESET/OE FIRST BIT TOOE T OCE TOCE LAST BIT T OCK T CDF CE CLK DATA CEO |
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