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24LC160-ISN Datasheet(PDF) 1 Page - Microchip Technology

Part # 24LC160-ISN
Description  8K/16K 2.5V SPI O Bus Serial EEPROM
Download  12 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24LC160-ISN Datasheet(HTML) 1 Page - Microchip Technology

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© 1996 Microchip Technology Inc.
Preliminary
DS21145D-page 1
FEATURES
• SPI modes 0,0 and 1,1
• 3 MHz Clock Rate
• Single supply with programming operation down
to 2.5V
• Low Power CMOS Technology
- Max Write Current: 5 mA
- Read Current: 1.0 mA
- Standby Current: 1
µA typical
• Organization
- 1024 x 8 for 25LC080
- 2048 x 8 for 25LC160
• 16 Byte Page
• Sequential Read
• Self-timed ERASE and WRITE Cycles
• Block Write Protection
- Protect none, 1/4, 1/2, or all of Array
• Built-in Write Protection
- Power On/Off Data Protection Circuitry
- Write Latch
- Write Protect Pin
• High Reliability
- Endurance: 10M cycles (guaranteed)
- Data Retention: >200 years
- ESD protection: >4000 V
• 8-pin PDIP/SOIC Packages
• Temperature ranges supported
DESCRIPTION
The Microchip Technology Inc. 25LC080/160 are 8K
and 16K bit Serial Electrically Erasable PROMs. The
memory is accessed via a simple Serial Peripheral
Interface (SPI) compatible serial bus. The bus signals
required are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
There are two other inputs that provide the end user
with additional flexibility. Communication to the device
can be paused via the hold pin (HOLD). While the
device is paused, transitions on its inputs will be
ignored, with the exception of chip select, allowing the
host to service higher priority interrupts. Also, write
operations to the Status Register can be disabled via
the write protect pin (WP).
- Commercial (C):
0
°C to
+70
°C
- Industrial (I):
-40
°C to
+85
°C
PACKAGE TYPES
BLOCK DIAGRAM
CS
SO
WP
VSS
1
2
3
4
VCC
HOLD
SCK
SI
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
PDIP
SOIC
SI
SO
SCK
CS
HOLD
WP
Status
Register
I/O Control
Memory
Control
Logic
X
Dec
HV Generator
EEPROM
Array
Page Latches
Y Decoder
Sense Amp.
R/W Control
Logic
Vcc
Vss
25LC080/160
8K/16K 2.5V SPIBus Serial EEPROM
SPI is a trademark of Motorola.
This document was created with FrameMaker404


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