ISL76683

9

FN7697.7

March 24, 2014

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Command Register 00(hex)

The Read/Write command register has five functions:

1. Enable; Bit 7. This function either resets the ADC or enables

the ADC in normal operation. A logic 0 disables ADC to reset

mode. A logic 1 enables ADC to normal operation.

2. ADCPD; Bit 6. This function puts the device in a power-down

mode. A logic 0 puts the device in normal operation. A logic 1

powers down the device.

For proper shut down operation, it is recommended to disable

ADC first then disable the chip. Specifically, the user should first

with Bit 6 = 1.

3. Timing Mode; Bit 5. This function determines whether the

integration time is done internally or externally. In Internal

Timing Mode, integration time is determined by an internal dual

inside the ADC. In External Timing Mode, integration time is

determined by the time between two consecutive external-sync

sync_iic pulse commands.

4. Photodiode Select Mode; Bits 3 and 2. This function controls

the mux attached to the two photodiodes. At Mode1, the mux

directs the current of Diode1 to the ADC. At Mode2, the mux

directs the current of Diode2 only to the ADC. Mode3 is a

sequential Mode1 and Mode2 with an internal subtract

function (Diode1 - Diode2).

*n = 4, 8, 12,16 depending on the number of clock cycles

function.

5. Width; Bits 1 and 0. This function determines the number of

clock cycles per conversion. Changing the number of clock

cycles does more than just change the resolution of the

device; it also changes the integration time, which is the

period the device’s analog-to-digital (A/D) converter samples

the photodiode current signal for a lux measurement.

Control Register 01(hex)

The Read/Write control register has three functions:

1. Interrupt flag; Bit 5. This is the status bit of the interrupt. The

bit is set to logic high when the interrupt thresholds have been

triggered, and logic low when not yet triggered.

TABLE 2. WRITE ONLY REGISTERS

ADDRESS

REGISTER

NAME

FUNCTIONS/

DESCRIPTION

b1xxx_xxxx

sync_iic

Writing a logic 1 to this address bit ends

the current ADC-integration and starts

another. Used only with External Timing

Mode.

bx1xx_xxxx

clar_int

Writing a logic 1 to this address bit clears

the interrupt.

TABLE 3. ENABLE

BIT 7

OPERATION

0

Disable ADC-Core to Reset-Mode (default)

1

Enable ADC-Core to Normal Operation

TABLE 4. ADCPD

BIT 6

OPERATION

0

Normal Operation (default)

1Power-Down

TABLE 5. TIMING MODE

BIT 5

OPERATION

0

Internal Timing Mode. Integration time is internally

cycles.

1

External Timing Mode. Integration time is externally

TABLE 6. PHOTODIODE SELECT MODE; BITS 2 AND 3

BITS 3:2

MODE

0:0

MODE1. ADC integrates or converts Diode1 only. Current

is converted to an n-bit unsigned data.*

0:1

MODE2. ADC integrates or coverts Diode2 only. Current is

converted to an n-bit unsigned data.*

1:0

MODE3. A sequential MODE1 then MODE2 operation.

The difference current is an (n-1) signed data.*

1:1

No Operation.

TABLE 7. WIDTH

BITS 1:0

NUMBER OF CLOCK CYCLES

0:0

0:1

1:0

1:1

TABLE 8. INTERRUPT FLAG

BIT 5

OPERATION

0

Interrupt is cleared or not triggered yet

1

Interrupt is triggered