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ISL29125EVAL1Z Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL29125EVAL1Z Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 17 page ISL29125 10 FN8424.2 January 24, 2014 Submit Document Feedback RGB Operating Modes [B2:B0] This device has various RGB operating modes. These modes are selected by setting B2:B0 bits in Table 4. The device powers up on a disable mode. All operating modes are in continuous ADC conversion. The following bits are used to enable the operating mode RGB Data Sensing Range [B3] The Full Scale RGB Range has two different selectable ranges at bit 3. The range determines the ADC resolution (12 bits and 16 bits). Each range has a maximum allowable lux value. Higher range values offer better resolution and wider lux value. ADC Resolution [B4] ADC’s resolution and the number of clock cycles per conversion is determined by this bit in Table 6. Changing the resolution of the ADC, changes the number of clock cycles of the ADC which in turn changes the integration time. Integration time is the period the ADC samples the photodiode current signal for a measurement RGB Start Synced at INT Pin SYNC has two different selectable modes at bit 5. B5 sets to 0 then the INT pin gets asserted whenever the sensor interrupts. B5 sets to 1 then the INT pin becomes input pin. On the rising edge at INT pin, SYNC starts ADC conversion. The INT pin sets to interrupt mode by default. More information about SYNC at “Principles of Operation” on page 6. Configuration-2 Register (Address: 0x02) ACTIVE INFRARED (IR) COMPENSATION The device is designed for operation under dark glass cover which significantly attenuates visible light and pass the infrared light without much attenuation. The device has an on chip passive optical filter designed to block (reject) most of the incident Infra Red. In addition, the device provides a programmable active IR compensation which allows fine tuning of residual infrared components from the output which allows optimizing the measurement variation between differing IR-content light sources. B7 is “IR Comp Offset” and B[5:0] is “IR Comp Adjust” which provides means for adjusting IR compensation. B7=‘0’ + B[5:0] is the effective IR compensation from 0 to 63 codes and B7set to ‘1’+B[5:0] the effective IR compensation is from 106 to 169. Table 9 shows lightweight for each IR compensation bit and Figure 12 is a typical system measure for both IR Comp Adjust and IR Comp Offset. More detail about how to IR compensation, see IR compensation in “Applications Information” on page 13. Recommended to set BF at register 0x02 to max out IR compensation value. It make High range reach more than 10,000lux. TABLE 4. OPERATION MODES B2:B0 OPERATION 000 Power Down (ADC conversion) 001 GREEN Only 010 RED Only 011 BLUE Only 100 Stand by (No ADC conversion) 101 GREEN/RED/BLUE 110 GREEN/RED 111 GREEN/BLUE TABLE 5. SENSING RANGES B3 RANGES 0 375 lux 1 10,000 lux TABLE 6. ADC RESOLUTIONS B4 RESOLUTION 016 bits 112 bits TABLE 7. SYNCED AT INT B5 OPERATION 0 ADC start at I2C write 0x01 1 ADC start at rising INT TABLE 8. CONFIGURATION-2 NAME REGISTER ADDRESS REGISTER BITS DEFAULT ACCESS DEC HEX B7 B6 B5 B4 B3 B2 B1 B0 Configuration-2 2 0x02 IR-COM RESERVED ALSCC[5] ALSCC[4] ALSCC[3] ALSCC[2] ALSCC[1] ALSCC[0] 0x00 RW |
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