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X9409WV24IZ-2.7 Datasheet(PDF) 6 Page - Intersil Corporation

Part # X9409WV24IZ-2.7
Description  Low Noise/Low Power/2-Wire BusQuad Digitally Controlled Potentiometers (XDCP)
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9409WV24IZ-2.7 Datasheet(HTML) 6 Page - Intersil Corporation

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X9409
6
FN8192.6
September 3, 2015
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CAPACITANCE
CI/O
(Note 10)
Input/Output Capacitance (SDA)
VI/O = 0V
8
pF
CIN
(Note 10)
Input Capacitance (A0, A1, A2, A3 and SCL) VIN = 0V
6
pF
POWER-UP TIMING
tr VCC
(Note 11)
VCC Power-Up Rate
0.2
50
V/ms
A.C. TEST CONDITIONS
Input Pulse Levels
VCC x 0.1 to
VCC x0.9
Input Rise and Fall Times
10ns
Input and Output Timing Level
VCC x 0.5
Analog Characteristics Across the recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 6)TYP
MAX
(Note 6)UNITS
FIGURE 2. EQUIVALENT A.C. LOAD CIRCUIT
FIGURE 3. CIRCUIT #3 SPICE MACRO MODEL
AC TIMING Across recommended operating conditions.
SYMBOL
PARAMETER
MIN
(Note 6)
MAX
(Note 6)UNITS
fSCL
Clock Frequency
400
kHz
tCYC
Clock Cycle Time
2500
ns
tHIGH
Clock High Time
600
ns
tLOW
Clock Low Time
1300
ns
tSU:STA
Start Setup Time
600
ns
tHD:STA
Start Hold Time
600
ns
tSU:STO
Stop Setup Time
600
ns
tSU:DAT
SDA Data Input Setup Time
100
ns
tHD:DAT
SDA Data Input Hold Time (Note 12)30
ns
tR
SCL and SDA Rise Time
300
ns
tF
SCL and SDA Fall Time
300
ns
tAA
SCL Low to SDA Data Output Valid Time
900
ns
tDH
SDA Data Output Hold Time
50
ns
TI
Noise Suppression Time Constant At SCL and SDA Inputs
50
ns
tBUF
Bus Free Time (Prior To Any Transmission)
1300
ns
5V
1533Ω
100pF
SDA Output
10pF
RH
RTOTAL
CH
25pF
CW
CL
10pF
RW
RL


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