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X9400WV24Z Datasheet(PDF) 3 Page - Intersil Corporation

Part # X9400WV24Z
Description  Quad Digitally Controlled Potentiometers
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9400WV24Z Datasheet(HTML) 3 Page - Intersil Corporation

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3
FN8189.4
September 2, 2015
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9400.
Chip Select (CS)
When CS is HIGH, the X9400 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9400, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A0 - A1)
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9400. A maximum of 4 devices may occupy the
SPI serial bus.
Potentiometer Pins
VH/RH (VH0/RH0 - VH3/RH3), VL/RL (VL0/RL0 -
VL3/RL3)
The VH/RH and VL/RL inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
VW/RW (VW0/RW0 - VW3/RW3)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
Analog Supplies (V+, V-)
The analog Supplies V+, V- are the supply voltages for
the XDCP analog section.
PIN CONFIGURATION
VCC
VL0/RL0
VH0/RH0
WP
SI
A1
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
V+
VL3/RL3
VH3/RH3
VW3/RW3
A0
SO
HOLD
SCK
VL2/RL2
VH2/RH2
SOIC
X9400
V
SS
VW0/RW0
14
13
11
12
CS
VL1/RL1
VH1/RH1
VW1/RW1
VW2/RW2
V-
SI
A1
VH2/RH2
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
WP
CS
VW0/RW0
VCC
V+
VL3/RL3
VH3/RH3
VW3/RW3
TSSOP
X9400
VW2/RW2
14
13
11
12
HOLD
VL1/RL1
VH1/RH1
VW1/RW1
A0
SO
VH0/RH0
V-
SCK
VL2/RL2
VL0/RL0
VSS
X9400


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