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X9250TS24Z-2.7 Datasheet(PDF) 3 Page - Intersil Corporation |
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X9250TS24Z-2.7 Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 20 page 3 FN8165.3 August 29, 2006 PIN DESCRIPTIONS Serial Output (SO) SO is a serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input SI is the serial data input pin. All opcodes, byte addresses and data to be written to the pots and pot registers are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The SCK input is used to clock data into and out of the X9250. Chip Select (CS) When CS is HIGH, the X9250 is deselected and the SO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. CS LOW enables the X9250, placing it in the active power mode. It should be noted that after a power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Hold (HOLD) HOLD is used in conjunction with the CS pin to select the device. Once the part is selected and a serial sequence is underway, HOLD may be used to pause the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume communication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD should be held HIGH at all times. Device Address (A0 - A1) The address inputs are used to set the least significant 2 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9250. A maximum of 4 devices may occupy the SPI serial bus. Potentiometer Pins VH/RH (VH0/RH0 - VH3/RH3), VL/RL (VL0/RL0 - VL3/RL3) The RH and RL pins are equivalent to the terminal connections on a mechanical potentiometer. VW/RW (VW0/RW0 - VW3/RW3) The wiper pins are equivalent to the wiper terminal of a mechanical potentiometer. Hardware Write Protect Input (WP) The WP pin when LOW prevents nonvolatile writes to the Data Registers. Analog Supplies (V+, V-) The analog supplies V+, V- are the supply voltages for the XDCP analog section. PIN CONFIGURATION PIN NAMES Symbol Description SCK Serial Clock SI, SO Serial Data A0-A1 Device Address VH0/RH0–VH3/RH3, VL0/RL0–VL3/RL3 Potentiometer Pins (terminal equivalent) VW0/RW0–VW3/RW3 Potentiometer Pins (wiper equivalent) WP Hardware Write Protection V+,V- Analog Supplies VCC System Supply Voltage VSS System Ground NC No Connection S0 A0 VW3/RW3 V+ VCC VL0/RL0 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 HOLD SCK VL2/RL2 VH2/RL2 VW2/RW2 V– VSS VW1/RW1 VH1/RH1 VL1/RL1 SOIC/TSSOP X9250 VH3/RH3 14 13 11 12 VL3/RL3 VH0/RH0 VW0/RW0 CS A1 SI WP X9250 |
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