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X9111TV14Z-2.7 Datasheet(PDF) 4 Page - Intersil Corporation |
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X9111TV14Z-2.7 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 17 page 4 FN8159.4 September 15, 2006 These switches are controlled by a Wiper Counter Register (WCR). The 10-bits of the WCR (WCR[9:0]) are decoded to select, and enable, one of 1024 switches. Wiper Counter Register (WCR) The X9111 contains a Wiper Counter Register (see Table 1) for the XDCP potentiometer. The WCR is equivalent to a serial-in, parallel-out register/counter with its outputs decoded to select one of 1024 switches along its resistor array. The contents of the WCR can be altered in one of three ways: (1) it may be written directly by the host via the write Wiper Counter Register instruction (serial load); (2) it may be written indirectly by transferring the contents of one of four associated Data Registers via the XFR Data Register; (3) it is loaded with the contents of its Data Register zero (DR0) upon power-up. The Wiper Counter Register is a volatile register; that is, its contents are lost when the X9111 is powered-down. Although the register is automatically loaded with the value in R0 upon power-up, this may be different from the value present at power-down. Power-up guidelines are recommended to ensure proper loadings of the R0 value into the WCR. Data Registers (DR3 to DR0) The potentiometer has four 10-bit non-volatile Data Registers. These can be read or written directly by the host. Data can also be transferred between any of the four Data Registers and the Wiper Counter Register. All operations changing data in one of the Data Registers is a nonvolatile operation and will take a maximum of 10ms. If the application does not require storage of multiple settings for the potentiometer, the Data Registers can be used as regular memory locations for system parameters or user preference data. A DR[9:0] is used to store one of the 1024 wiper position (0 ~1023). Table 2 Status Register (SR) This 1-bit status register is used to store the system status (see Table 3). WIP: Write In Progress status bit, read only. • When WIP=1, indicates that high-voltage write cycle is in progress. • When WIP=0, indicates that no high-voltage write cycle is in progress. Device Instructions Identification Byte (ID and A) The first byte sent to the X9111 from the host, following a CS going HIGH to LOW, is called the Identification Byte. The most significant four bits of the slave address are a device type identifier. The ID[3:0] bits is the device ID for the X9111; this is fixed as 0101[B] (refer to Table 4). The A1–A0 bits in the ID byte are the internal slave address. The physical device address is defined by the state of the A1–A0 input pins. The slave address is externally specified by the user. The X9111 compares the serial data stream with the address input state; a successful compare of the address Serial Data Path From Interface Register 0 Serial Bus Input Parallel Bus Input Counter Register R H R L R W 10 10 C O U N T E R D E C O D E If WCR = 000[HEX] then RW = RL If WCR = 3FF[HEX] then RW = RH Wiper (WCR) (DR0) Circuitry Register 1 (DR1) Register 2 (DR2) Register 3 (DR3) FIGURE 1. DETAILED POTENTIOMETER BLOCK DIAGRAM X9111 |
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