1

+INR

2

3

4

-INR

OUTR

SGND

5

6

7

8

EN

PVSS

CN

9

10

11

12

13

14

CP

PVDD

PGND

OUTL

-INL

+INL

ChargePump

NC

a

DRV602

SLOS572D – DECEMBER 2008 – REVISED OCTOBER 2010

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

PW (TSSOP) PACKAGE

(TOP VIEW)

PIN FUNCTIONS

PIN

DESCRIPTION

NAME

TSSOP (PW)

+INR

1

I

Right channel OPAMP positive input

–INR

2

I

Right channel OPAMP negative input

OUTR

3

O

Right channel OPAMP output

SGND

4

I

Signal ground

EN

5

I

Enable input, active high

PVSS

6

O

Supply voltage

CN

7

I/O

Charge pump flying capacitor negative terminal

CP

8

I/O

Charge pump flying capacitor positive terminal

PVDD

9

I

Positive supply

PGND

10

I

Power ground

NC

11

No internal connection

OUTL

12

O

Left channel OPAMP output

–INL

13

I

Left channel OPAMP negative input

+INL

14

I

Left channel OPAMP positive input

(1)

I = input, O = output, P = power

2

Copyright © 2008–2010, Texas Instruments Incorporated

Product Folder Link(s): DRV602