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KAD5514P-21Q72 Datasheet(PDF) 6 Page - Intersil Corporation

Part # KAD5514P-21Q72
Description  14-Bit, 250/210/170/125MSPS ADC
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

KAD5514P-21Q72 Datasheet(HTML) 6 Page - Intersil Corporation

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6
FN6804.2
September 10, 2009
Intermodulation
Distortion
IMD
fIN = 70MHz
-89.2
-92.3
-94.5
-94.9
dBFS
fIN = 170MHz
-91.4
-86.9
-91.7
-85.7
dBFS
Word Error Rate
WER
10-12
10-12
10-12
10-12
Full Power Bandwidth
FPBW
950
950
950
950
MHz
NOTES:
4. Digital Supply Current is dependent upon the capacitive loading of the digital outputs. IOVDD specifications apply for 10pF load on each digital output.
5. See Nap /Sleep Mode description on page 21 for more detail.
6. The DLL Range setting must be changed for low speed operation. See the “Serial Peripheral Interface” on page 22 for more detail.
7. Parameters with MIN and/or MAX limits are 100% production tested at their worst case temperature extreme (+85°C).
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, fSAMPLE = Maximum Conversion Rate
(per speed grade). (Continued)
PARAMETER
SYMBOL
CONDITIONS
KAD5514P-25
(Note 7)
KAD5514P-21
(Note 7)
KAD5514P-17
(Note 7)
KAD5514P-12
(Note 7)
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
Digital Specifications
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUTS
Input Current High
(SDIO, RESETN)
IIH
VIN = 1.8V
0
1
10
µA
Input Current Low
(SDIO, RESETN)
IIL
VIN = 0V
-25
-12
-5
µA
Input Voltage High
(SDIO, RESETN)
VIH
1.17
V
Input Voltage Low
(SDIO, RESETN)
VIL
.63
V
Input Current High (OUTMODE,
NAPSLP, CLKDIV, OUTFMT)
(Note 8)
IIH
15
25
40
µA
Input Current Low (OUTMODE,
NAPSLP, CLKDIV, OUTFMT)
IIL
-40
25
-15
µA
Input Capacitance
CDI
3pF
LVDS OUTPUTS
Differential Output Voltage
VT
3mA Mode
620
mVP-P
Output Offset Voltage
VOS
3mA Mode
950
965
980
mV
Output Rise Time
tR
500
ps
Output Fall Time
tF
500
ps
CMOS OUTPUTS
Voltage Output High
VOH
IOH = -500µA
OVDD - 0.3
OVDD - 0.1
V
Voltage Output Low
VOL
IOL = 1mA
0.1
0.3
V
Output Rise Time
tR
1.8
ns
Output Fall Time
tF
1.4
ns
KAD5514P


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