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PSMN5R0-100ES Datasheet(PDF) 3 Page - NXP Semiconductors |
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PSMN5R0-100ES Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 15 page PSMN5R0-100ES All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 26 September 2011 3 of 15 NXP Semiconductors PSMN5R0-100ES N-channel 100 V 5 m Ω standard level MOSFET in I2PAK 4. Limiting values [1] Continuous current limited by package Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 100 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS =20kΩ - 100 V VGS gate-source voltage -20 20 V ID drain current VGS =10 V; Tj = 100 °C; see Figure 1 -110 A VGS =10 V; Tmb =25°C; see Figure 1 [1] - 120 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb =25°C; see Figure 3 - 622 A Ptot total power dissipation Tmb =25°C; see Figure 2 - 338 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode IS source current Tmb =25°C [1] - 120 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 622 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy VGS =10 V; Tj(init) =25 °C; ID =120 A; Vsup ≤ 100 V; RGS =50 Ω; Unclamped - 537 mJ Fig 1. Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aaf735 0 40 80 120 160 200 0 50 100 150 200 T mb(°C) I D (A) (1) Tmb (°C) 0 200 150 50 100 03aa16 40 80 120 Pder (%) 0 |
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