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MX29F040TI-55 Datasheet(PDF) 1 Page - Macronix International |
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MX29F040TI-55 Datasheet(HTML) 1 Page - Macronix International |
1 / 40 page FEATURES • 524,288 x 8 only • Single power supply operation - 5.0V only operation for read, erase and program op- eration • Fast access time: 55/70/90/120ns • Low power consumption - 30mA maximum active current(5MHz) - 1uA typical standby current • Command register architecture - Byte Programming (7us typical) - Sector Erase 8 equal sectors of 64K-Byte each • Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address • Erase suspend/Erase Resume - Suspends an erase operation to read data from, or during erase and programming, while maintaining maxi- mum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and program mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29F040 uses a 5.0V ±10% VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V. GENERAL DESCRIPTION The MX29F040 is a 4-mega bit Flash memory organized as 512K bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-vola- tile random access memory. The MX29F040 is pack- aged in 32-pin PLCC, TSOP, PDIP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29F040 offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F040 has separate chip enable (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F040 uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels program data to, another sector that is not being erased, then resumes the erase. • Status Reply - Data polling & Toggle bit for detection of program and erase cycle completion. • Sector protect/unprotect for 5V only system or 5V/ 12V system. • Sector protection - Hardware method to disable any combination of sectors from program or erase operations • 100,000 minimum erase/program cycles • Latch-up protected to 100mA from -1V to VCC+1V • Low VCC write inhibit is equal to or less than 3.2V • Package type: - 32-pin PLCC, TSOP or PDIP • Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash • 20 years data retention 1 P/N:PM0538 REV. 2.3, DEC. 10, 2004 MX29F040 4M-BIT[512KX8]CMOSEQUALSECTORFLASHMEMORY |
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