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MX29F022NTPC-12 Datasheet(PDF) 4 Page - Macronix International |
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MX29F022NTPC-12 Datasheet(HTML) 4 Page - Macronix International |
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4 / 46 page  4 P/N:PM0556 REV. 1.3, NOV. 11, 2002 MX29F022/022NT/B AUTOMATIC PROGRAMMING The MX29F022T/B is byte programmable using the Automatic Programming algorithm. The Automatic Programming algorithm does not require the system to time out or verify the data programmed. The typical chip programming time of the MX29F022T/B at room tem- perature is less than 2 seconds. AUTOMATIC CHIP ERASE The entire chip is bulk erased using 10ms erase pulses according to MXIC's High Reliability Chip Erase algorithm. Typical erasure at room temperature is accomplished in less than two second. The device is erased using the Automatic Erase algorithm. The Automatic Erase algorithm automatically programs the entire array prior to electrical erase. The timing and verification of electrical erase are internally controlled within the device. AUTOMATIC SECTOR ERASE The MX29F022T/B is sector(s) erasable using MXIC's Auto Sector Erase algorithm. Sector erase modes allow sectors of the array to be erased in one erase cycle. The Automatic Sector Erase algorithm automatically pro- grams the specified sector(s) prior to electrical erase. The timing and verification of electrical erase are inter- nally controlled by the device. AUTOMATIC PROGRAMMING ALGORITHM MXIC's Automatic Programming algorithm requires the user to only write a program set-up commands (include 2 unlock write cycle and A0H) include 2 unlock write cycle and A0H and a program command (program data and address). The device automatically times the pro- gramming pulse width, verifies the program verification, and counts the number of sequences. A status bit simi- lar to DATA polling and a status bit toggling between con- secutive read cycles, provides feedback to the user as to the status of the programming operation. AUTOMATIC ERASE ALGORITHM MXIC's Automatic Erase algorithm requires the user to write commands to the command register using stan- dard microprocessor write timings. The device will au- tomatically pre-program and verify the entire array. Then the device automatically times the erase pulse width, verifies the erase, and counts the number of sequences. A status bit similar to DATA polling and status bit tog- gling between consecutive read cycles provides feed- back to the user as to the status of the programming operation. Commands are written to the command register using standard microprocessor write timings. Register con- tents serve as inputs to an internal state-machine which controls the erase and programming circuitry. During write cycles, the command register internally latches address and data needed for the programming and erase operations. During a system write cycle addresses are latched on the falling edge, and data are latched on the rising edge of WE . MXIC's Flash technology combines years of EPROM experience to produce the highest levels of quality, reli- ability, and cost effectiveness. The MX29F022T/B elec- trically erases all bits simultaneously using Fowler- Nordheim tunneling. The bytes are programmed one byte at a time using the EPROM programming mecha- nism of hot electron injection. During a program cycle, the state-machine will control the program sequences and command register will not respond to any command set. During a Sector Erase cycle, the command register will only respond to Erase Suspend command. After Erase Suspend is completed, the device stays in read mode. After the state machine has completed its task, it will allow the command regis- ter to respond to its full command set. |
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