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MX29F002TTC-12 Datasheet(PDF) 4 Page - Macronix International

Part # MX29F002TTC-12
Description  2M-BIT [256K x 8] CMOS FLASH MEMORY
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Manufacturer  MCNIX [Macronix International]
Direct Link  http://www.macronix.com
Logo MCNIX - Macronix International

MX29F002TTC-12 Datasheet(HTML) 4 Page - Macronix International

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REV. 1.5, MAR. 28, 2005
P/N: PM0547
MX29F002/002N T/B
AUTOMATIC PROGRAMMING
The MX29F002T/B is byte programmable using the
Automatic Programming algorithm. The Automatic
Programming algorithm does not require the system to
time out or verify the data programmed. The typical chip
programmingtimeoftheMX29F002T/Batroomtemperature
is less than 3.5 seconds.
AUTOMATIC CHIP ERASE
Typical erasure at room temperature is accomplished in
less than 3 seconds. The device is erased using the
Automatic Erase algorithm. The Automatic Erase algorithm
automatically programs the entire array prior to electrical
erase. The timing and verification of electrical erase are
internally controlled by the device.
AUTOMATIC SECTOR ERASE
The MX29F002T/B is sector(s) erasable using MXIC's
Auto Sector Erase algorithm. Sector erase modes allow
sectors of the array to be erased in one erase cycle. The
Automatic Sector Erase algorithm automatically programs
the specified sector(s) prior to electrical erase. The timing
and verification of electrical erase are internally controlled
by the device.
AUTOMATIC PROGRAMMING ALGORITHM
MXIC's Automatic Programming algorithm requires the
user to only write a program set-up commands include 2
unlock write cycle and A0H and a program command
(program data and address). The device automatically
times the programming pulse width, verifies the program,
and counts the number of sequences. A status bit similar
to DATA polling and a status bit toggling between
consecutive read cycles, provides feedback to the user as
to the status of the programming operation.
AUTOMATIC ERASE ALGORITHM
MXIC's Automatic Erase algorithm requires the user to
write commands to the command register using standard
microprocessor write timings. The device will automati-
cally pre-program and verify the entire array. Then the
device automatically times the erase pulse width, verifies
the erase, and counts the number of sequences. A status
bit similar to DATA polling and status bit toggling between
consecutive read cycles provides feedback to the user as
to the status of the programming operation.
Commands are written to the command register using
standard microprocessor write timings. Register contents
serve as inputs to an internal state-machine which controls
the erase and programming circuitry. During write cycles,
the command register internally latches address and data
needed for the programming and erase operations. During
a system write cycle, addresses are latched on the falling
edge, and data are latched on the rising edge of WE .
MXIC's Flash technology combines years of EPROM
experience to produce the highest levels of quality, relia-
bility, and cost effectiveness. The MX29F002T/B electri-
cally erases all bits simultaneously using Fowler-Nord-
heim tunneling. The bytes are programmed one byte at a
time using the EPROM programming mechanism of hot
electron injection.
During a program cycle, the state-machine will control the
program sequences and command register will not re-
spond to any command set. During a Sector Erase cycle,
the command register will only respond to Erase Suspend
command. After Erase Suspend is completed, the device
stays in read mode. After the state machine has com-
pleted its task, it will allow the command register to
respond to its full command set.


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