D2-7xx83

6

FN7838.2

September 29, 2011

Thermal Information

Supply Voltage

RVDD, PWMVDD, ADCVDD . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 4.0V

CVDD, PLLVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.4V

Input Voltage

Any Input but XTALI . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to RVDD +0.3V

XTALI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to PLLVDD +0.3V

Input Current, Any Pin but Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . ±10mA

Thermal Resistance (Typical)

θJA (°C/W) θJC (°C/W)

128 Ld LQFP Package (Notes 4, 5) . . . . . .

40

6.5

Maximum Storage Temperature. . . . . . . . . . . . . . . . . . . . -55°C to +150°C

Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Recommended Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10°C to +85°C

Digital I/O Supply Voltage, PWMVDD . . . . . . . . . . . . . . . . . . . . . . . . . . .3.3V

Core Supply Voltage, CVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.8V

Analog Supply Voltage, PLLVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.8V

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product

reliability and result in failures not covered by warranty.

NOTES:

4.

5. For

6. Absolute Maximum parameters are not tested in production.

voltages referenced to ground. PLL at 294.912MHz, OSC at 24.576MHz, core running at 147.456MHz with typical audio data traffic. Minimum

supply currents are measured in full power down configuration.

SYMBOL

PARAMETER

TEST

CONDITIONS

MIN

(Note 10)

TYP

MAX

(Note 10)

UNIT

Digital Input High Logic Level (Note 7)

RVDD = 3.3V

(Scales with

RVDD)

2.0

-

-

V

Digital Input Low Logic Level (Note 7)

RVDD = 3.3V

(Scales with

RVDD)

--

0.8

V

High Level Output Drive Voltage

page 12)

RVDD - 0.4

-

-

V

Low Level Output Drive Voltage

page 12)

--

0.4

V

VIHX

High Level Input Drive Voltage XTALI Pin

0.7

-

PLLVDD

V

VILX

Low Level Input Drive Voltage XTALI Pin

-

-

0.3

V

Input Leakage Current (Note 8)

-

-

±10

µA

Input Capacitance

-

9

-

pF

VOHO

High Level Output Drive Voltage OSCOUT Pin

PLLVDD - 0.3

-

-

V

VOLO

Low Level Output Drive Voltage OSCOUT Pin

-

-

0.3

V

Output Capacitance

-

9

-

pF

nRESET Pulse Width

-

10

-

ns

Typical Digital and PWM I/O Pad Ring Supply

(Voltage)

3.0

3.3

3.6

V

(Current, Active)

-

15

-

mA

(Current, Power-down)

-

<1

-

mA

CVDD

Typical Core Supply

(Voltage)

1.7

1.8

1.9

V

(Current, Active)

-

450

-

mA

(Current, Power-down)

-

15

-

mA

PLLVDD

Typical PLL Analog Supply

1.7

1.8

1.9

V

(Current, Active)

-

25

-

mA

(Current, Power-down)

-

10

-

mA