Electronic Components Datasheet Search |
|
SM320C6678-HIREL Datasheet(PDF) 9 Page - Texas Instruments |
|
SM320C6678-HIREL Datasheet(HTML) 9 Page - Texas Instruments |
9 / 244 page SM320C6678-HIREL SPRS910A—November 2010—Revised August 2013 Copyright 2014 Texas Instruments Incorporated List of Figures 9 Submit Documentation Feedback List of Figures Figure 1-1 Electromigration Fail Mode Derating Chart . . . . . . .2 Figure 1-2 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . .5 Figure 2-1 DSP Core Data Paths . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 2-2 Boot Mode Pin Decoding . . . . . . . . . . . . . . . . . . . . . . 24 Figure 2-3 No Boot/ EMIF16 Configuration Fields. . . . . . . . . . 26 Figure 2-4 Serial Rapid I/O Device Configuration Fields . . . . 26 Figure 2-5 Ethernet (SGMII) Device Configuration Fields . . . 27 Figure 2-6 PCI Device Configuration Fields. . . . . . . . . . . . . . . . 27 Figure 2-7 I2C Master Mode Device Configuration Bit Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 2-8 I2C Passive Mode Device Configuration Bit Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 2-9 SPI Device Configuration Bit Fields . . . . . . . . . . . . . 29 Figure 2-10 HyperLink Boot Device Configuration Fields. . . . 30 Figure 2-11 CYP 841-Pin BGA Package (Bottom View). . . . . . . 39 Figure 2-12 Pin Map Quadrants (Bottom View) . . . . . . . . . . . . . 39 Figure 2-13 Upper Left Quadrant—A (Bottom View) . . . . . . . . 40 Figure 2-14 Upper Right Quadrant—B (Bottom View) . . . . . . 41 Figure 2-15 Lower Right Quadrant—C (Bottom View) . . . . . . 42 Figure 2-16 Lower Left Quadrant—D (Bottom View). . . . . . . . 43 Figure 2-17 C66x DSP Device Nomenclature (including the SM320C6678) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Figure 3-1 Device Status Register . . . . . . . . . . . . . . . . . . . . . . . . . 78 Figure 3-2 Device Configuration Register (DEVCFG) . . . . . . . 79 Figure 3-3 JTAG ID Register (JTAGID) . . . . . . . . . . . . . . . . . . . . . 79 Figure 3-4 DSP BOOT Address Register (DSP_BOOT_ADDRn) . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Figure 3-5 LRESETNMI PIN Status Register (LRSTNMIPINSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Figure 3-6 LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR) . . . . . . . . . . . . . . . . . . . . . . . 81 Figure 3-7 Reset Status Register (RESET_STAT) . . . . . . . . . . . . 83 Figure 3-8 Reset Status Clear Register (RESET_STAT_CLR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Figure 3-9 Boot Complete Register (BOOTCOMPLETE) . . . . . 85 Figure 3-10 Power State Control Register (PWRSTATECTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Figure 3-11 NMI Generation Register (NMIGRx). . . . . . . . . . . . . 86 Figure 3-12 IPC Generation (IPCGRx) Registers . . . . . . . . . . . . . 87 Figure 3-13 IPC Acknowledgement (IPCARx) Registers. . . . . . 88 Figure 3-14 IPC Generation (IPCGRH) Registers . . . . . . . . . . . . . 88 Figure 3-15 IPC Acknowledgement Register (IPCARH) . . . . . . 89 Figure 3-16 Timer Input Selection Register (TINPSEL) . . . . . . . 90 Figure 3-17 Timer Output Selection Register (TOUTPSEL) . . . 93 Figure 3-18 Reset Mux Register (RSTMUXx). . . . . . . . . . . . . . . . . 94 Figure 3-19 DSP Suspension Control Register (DSP_SUSP_CTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Figure 3-20 Device Speed Register (DEVSPEED) . . . . . . . . . . . . 96 Figure 3-21 Chip Miscellaneous Control Register (CHIP_MISC_CTL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Figure 4-1 TeraNet 2A for C6678. . . . . . . . . . . . . . . . . . . . . . . . . . 99 Figure 4-2 TeraNet 3A for C6678. . . . . . . . . . . . . . . . . . . . . . . . . 100 Figure 4-3 TeraNet 3P_A & B for C6678 . . . . . . . . . . . . . . . . . . 102 Figure 4-4 TeraNet 6P_B and 3P_Tracer for C6678. . . . . . . . 103 Figure 5-1 C66x CorePac Block Diagram . . . . . . . . . . . . . . . . . .108 Figure 5-2 L1P Memory Configurations . . . . . . . . . . . . . . . . . . .109 Figure 5-3 L1D Memory Configurations . . . . . . . . . . . . . . . . . .110 Figure 5-4 L2 Memory Configurations . . . . . . . . . . . . . . . . . . . .111 Figure 5-5 CorePac Revision ID Register (MM_REVID) Address - 0181 2000h . . . . . . . . . . . . . . . . . . . . . . . . .115 Figure 7-1 Input and Output Voltage Reference Levels for AC Timing Measurements. . . . . . . . . . . . . . . . . .121 Figure 7-2 Rise and Fall Transition Time Voltage Reference Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121 Figure 7-3 Core Before IO Power Sequencing . . . . . . . . . . . .124 Figure 7-4 IO Before Core Power Sequencing . . . . . . . . . . . .126 Figure 7-5 SmartReflex 4-Pin VID Interface Timing . . . . . . . .129 Figure 7-6 RESETFULL Reset Timing . . . . . . . . . . . . . . . . . . . . . .139 Figure 7-7 Soft/Hard-Reset Timing . . . . . . . . . . . . . . . . . . . . . . .139 Figure 7-8 Boot Configuration Timing . . . . . . . . . . . . . . . . . . . .140 Figure 7-9 Main PLL and PLL Controller . . . . . . . . . . . . . . . . . .141 Figure 7-10 PLL Secondary Control Register (SECCTL)) . . . . .145 Figure 7-11 PLL Controller Divider Register (PLLDIVn) . . . . . .146 Figure 7-12 PLL Controller Clock Align Control Register (ALNCTL). . . . . . . . . . . . . . . . . . . . . . . . . . . . .146 Figure 7-13 PLLDIV Divider Ratio Change Status Register (DCHANGE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .147 Figure 7-14 SYSCLK Status Register (SYSTAT) . . . . . . . . . . . . . .147 Figure 7-15 Reset Type Status Register (RSTYPE) . . . . . . . . . . .148 Figure 7-16 Reset Control Register (RSTCTRL) . . . . . . . . . . . . . .149 Figure 7-17 Reset Configuration Register (RSTCFG). . . . . . . . .149 Figure 7-18 Reset Isolation Register (RSISO) . . . . . . . . . . . . . . . .150 Figure 7-19 Main PLL Control Register 0 (MAINPLLCTL0) . . .151 Figure 7-20 Main PLL Control Register 1 (MAINPLLCTL1) . . .151 Figure 7-21 Main PLL Controller/SRIO/HyperLink/PCIe Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . .153 Figure 7-22 Main PLL Clock Input Transition Time . . . . . . . . .153 Figure 7-23 DDR3 PLL Block Diagram . . . . . . . . . . . . . . . . . . . . . .154 Figure 7-24 DDR3 PLL Control Register 0 (DDR3PLLCTL0). . .154 Figure 7-25 DDR3 PLL Control Register 1 (DDR3PLLCTL1). . .155 Figure 7-26 DDR3 PLL DDRCLK Timing. . . . . . . . . . . . . . . . . . . . .156 Figure 7-27 PASS PLL Block Diagram . . . . . . . . . . . . . . . . . . . . . .157 Figure 7-28 PASS PLL Control Register 0 (PASSPLLCTL0) . . . .157 Figure 7-29 PASS PLL Control Register 1 (PASSPLLCTL1) . . . .158 Figure 7-30 PASS PLL Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .159 Figure 7-31 SM320C6678 Interrupt Topology . . . . . . . . . . . . . .167 Figure 7-32 SM320C6678 System Event Inputs — C66x CorePac Primary Interrupts . . . . . . . . . . . . . .168 Figure 7-33 NMI and Local Reset Timing . . . . . . . . . . . . . . . . . . .191 Figure 7-34 HOUT Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192 Figure 7-35 Configuration Register (CONFIG) . . . . . . . . . . . . . .200 Figure 7-36 Programmable Range n Start Address Register (PROGn_MPSAR) . . . . . . . . . . . . . . . . . . . . .201 Figure 7-37 Programmable Range n End Address Register (PROGn_MPEAR) . . . . . . . . . . . . . . . . . . . . .201 Figure 7-38 Programmable Range n Memory Protection Page Attribute Register (PROGn_MPPA) . . . . . . .202 Figure 7-39 I2C Module Block Diagram. . . . . . . . . . . . . . . . . . . . .209 |
Similar Part No. - SM320C6678-HIREL_15 |
|
Similar Description - SM320C6678-HIREL_15 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |