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HIP4020IBZ Datasheet(PDF) 3 Page - Intersil Corporation |
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HIP4020IBZ Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 10 page 3 FN3976.4 September 17, 2015 Absolute Maximum Ratings Thermal Information Supply Voltage; VDD to VSS or VSSA or VSSB . . . . . . . . . . . . .+15V Neg. Output Supply Voltage, (VSSA, VSSB) . . . . . . . . . . . . (Note 1) DC Logic Input Voltage (Each Input) . . . (VSS -0.5V) to (VDD +0.5V) DC Logic Input Current (Each Input) 15mA ILF Fault Output Current 15mA Output Load Current, (Self Limiting, See Elec. Spec.) IO(LIMIT) Operating Conditions TA = 25°C Typical Operating Supply Voltage Range, VDD . . . . . . . +3 to +12V Low Voltage Logic Retention, Min. VDD. . . . . . . . . . . . . . . . . . . .+2V Idle Supply Current; No Load, VDD = +5V. . . . . . . . . . . . . . . .0.8mA Typical P+N Channel rDS(ON), VDD = +5V, 0.5A Load . . . . . . . . 2 Thermal Resistance (Typical, Note 2) JA (°C/W) Plastic SOIC Package . . . . . . . . . . . . . . . . . . . . . . . 105 Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. VSS is the required common ground reference for the logic input switching. The load currents may be switched positive and negative in reference to the VSS common ground by using a split supply for VDD (positive) to VSSA and VSSB (negative). For an uneven split in the supply voltage, the Maximum Negative Output Supply Voltage for VSSA and VSSB is limited by the Maximum VDD to VSSA or VSSB ratings. Since the VDD pins are internally tied together, the voltage on each VDD pins must be equal and common. 2. JA is measured with the component mounted on an evaluation PC board in free air. 3. Refer to the Truth Table and the VEN to VOUT Switching Waveforms. Current, IO refers to IOUTA or IOUTB as the Output Load current. Note that ENA controls OUTA and ENB controls OUTB. Each Half H-Switch has independent control from the respective A1, A2, ENA or B1, B2, ENB inputs. Refer to the Terminal Information Table for external pin connections to establish mode control switching. Figure 1 shows a typical application circuit used to control a DC Motor. Electrical Specifications TA = 25°C, VDD = +5V, VSSA = VSSB = VSS = 0V, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Input Leakage Current ILEAK VDD = +15V - - 25 nA Low Level Input Voltage VIL VSS -0.8 V High Level Input Voltage VIH 2- VDD V ILF Output Low, Sink Current IOH VOUT = 0.4V, VDD = +12V 15 - - mA ILF Output High, Source Current IOL VOUT = 11.6V, VDD = +12V - - -15 mA Input Capacitance CIN -2 - pF P-Channel rDS(ON), Low Supply Voltage rDS(ON) VDD = +3V, ISOURCE = 250mA - 1.6 2.1 N-Channel rDS(ON), Low Supply Voltage rDS(ON) VDD = +3V, ISINK = 250mA - 1 1.5 P-Channel rDS(ON), High Supply Voltage rDS(ON) VDD = +12V, ISOURCE = 400mA - 0.6 1.2 N-Channel rDS(ON), High Supply Voltage rDS(ON) VDD = +12V, ISINK = 400mA - 0.5 1.1 OUTA, OUTB Source Current Limiting IO(LIMIT) VDD = +6V, VSS = 0V, VSSA = VSSB = -6V 480 625 1500 mA OUTA, OUTB Sink Current Limiting -IO(LIMIT) VDD = +6V, VSS = 0V, VSSA= VSSB = -6V 480 800 1500 mA Idle Supply Current; No Load IDD -0.8 1.5 mA OUTA, OUTB Voltage High VOH ISOURCE = 450mA 4.2 4.5 - V OUTA, OUTB Voltage Low VOL ISINK = 450mA - 0.4 0.6 V OUTA, OUTB Voltage High VOH VDD = +3V, ISOURCE = 250mA 2.415 2.6 - V OUTA, OUTB Voltage Low VOL VDD = +3V, ISINK = 250mA - 0.25 0.375 V OUTA, OUTB Source Current Limiting IO(LIMIT) VDD = +12V 480 625 1500 mA OUTA, OUTB Sink Current Limiting -IO(LIMIT) VDD = +12V 480 800 1500 mA OUTA, OUTB Source Current Limiting IO(LIMIT) VDD = +3V 480 625 1500 mA OUTA, OUTB Sink Current Limiting -IO(LIMIT) VDD = +3V 480 800 1500 mA HIP4020 |
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