NXP Semiconductors

PSMN7R5-30YLD

N-channel 30 V, 7.5 mΩ logic level MOSFET in LFPAK56 using

NextPowerS3 Technology

PSMN7R5-30YLD

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Product data sheet

7 February 2014

6 / 13

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

gate-source threshold

voltage variation with

temperature

-

-3.8

-

mV/K

-

-

1

µA

drain leakage current

-

0.23

-

µA

-

-

100

nA

gate leakage current

-

-

100

nA

Fig. 10

-

8.1

10.2

mΩ

Fig. 11; Fig. 10

-

-

16.9

mΩ

Fig. 10

-

6.1

7.5

mΩ

drain-source on-state

resistance

Fig. 11; Fig. 10

-

-

12.4

mΩ

gate resistance

f = 1 MHz

-

0.25

-

Ω

Dynamic characteristics

Fig. 12; Fig. 13

-

11.3

-

nC

Fig. 12; Fig. 13

-

5.5

-

nC

total gate charge

-

10.2

-

nC

gate-source charge

-

1.97

-

nC

pre-threshold gate-

source charge

-

1.14

-

nC

post-threshold gate-

source charge

-

0.83

-

nC

gate-drain charge

Fig. 12; Fig. 13

-

1.7

-

nC

gate-source plateau

voltage

-

2.9

-

V

input capacitance

-

655

-

pF

output capacitance

-

578

-

pF

reverse transfer

capacitance

-

50

-

pF

turn-on delay time

-

7.1

-

ns

rise time

-

10.4

-

ns

turn-off delay time

-

8.5

-

ns

fall time

-

5.5

-

ns