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TAS5760LD Datasheet(PDF) 11 Page - Texas Instruments |
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TAS5760LD Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 68 page  TAS5760LD www.ti.com SLOS781A – JULY 2013 – REVISED JULY 2015 Headphone Amplifier and Line Driver (continued) input signal is 1 kHz Sine, specifications are over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fCP Charge Pump Switching Frequency 200 300 400 kHz ICN(HP) Idle Channel Noise R(HP) = 32 Ω, A-Weighted 13 µVrms ICN(LD) Idle Channel Noise R(LD) = 3 kΩ, A-Weighted 11 µVrms R(HP) = 16 Ω, THD+N = 1%, Po(HP) Headphone Amplifier Output Power 40 mW Outputs in Phase Power Supply Rejection Ratio of PSRR(DR) 80 dB Headphone Amplifier and Line Driver (Referenced to 25 mW Output SNR(HP) Signal to Noise Ratio Signal), R(HP) = 16 Ω, A- 96 dB Weighted (Referenced to 2 Vrms Output SNR(LD) Signal to Noise Ratio Signal), R(LD) = 3 kΩ, A- 90 105 dB Weighted Total Harmonic Distortion and Noise for THD+N(HP) PO(HP) = 10 mW 0.01% the Headphone Amplifier Total Harmonic Distortion and Noise for THD+N(LD) VO(LD) = 2 Vrms 0.002% the Line Driver THD+N = 1%, R(LD) = 3kΩ, Vo(LD) Line Driver Output Voltage 2 2.4 Vrms Outputs in Phase Cross-talk (worst case between LtoR X-Talk(HP) PO(HP) = 20 mW –90 dB and RtoL coupling) Cross-talk (worst case between LtoR X-Talk(LD) Vo = 1 Vrms –111 dB and RtoL coupling) ZO(DR) Output Impedance when muted DR_MUTE = LOW 110 m Ω Current drawn from DRVDD supply in IMUTE(DR) DR_MUTE = LOW 12 mA mute Current drawn from DRVDD supply with DR_MUTE = HIGH, PO(HP) = 25 IDRVDD(HP) 60 mA headphone mW, Input = 1kHz Current drawn from DRVDD supply with DR_MUTE = HIGH, VO(LD) = 2 IDRVDD(LD) 12 mA line driver Vrms, Input = 1kHz 7.13 I²C Control Port specifications are over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CL(I²C) Allowable Load Capacitance for Each I²C 400 pF Line fSCL Support SCL frequency No Wait States 400 kHz tbuf Bus Free time between STOP and 1.3 µS START conditions tf(I²C) Rise Time, SCL and SDA 300 ns th1(I²C) Hold Time, SCL to SDA 0 ns th2(I²C) Hold Time, START condition to SCL 0.6 µs tI²C(start) I²C Startup Time 12 mS tr(I²C) Rise Time, SCL and SDA 300 ns tsu1(I²C) Setup Time, SDA to SCL 100 ns tsu2(I²C) Setup Time, SCL to START condition 0.6 µS tsu3(I²C) Setup Time, SCL to STOP condition 0.6 µS Tw(H) Required Pulse Duration, SCL HIGH 0.6 µS Tw(L) Required Pulse Duration, SCL LOW 1.3 µS Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TAS5760LD |
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