 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TAS5624A Datasheet(PDF) 9 Page - Texas Instruments |
|
||||||||||||||||||||||||||||||
TAS5624A Datasheet(HTML) 9 Page - Texas Instruments |
|
|
9 / 32 page  TAS5624A www.ti.com SLAS844 – MAY 2012 AUDIO SPECIFICATION MONO (PBTL) Audio performance is recorded as a chipset consisting of a TASxxxx PWM Processor (modulation index limited to 97.7%) and a TAS5624A power stage with PCB and system configurations in accordance with recommended guidelines. Audio frequency = 1kHz, PVDD_X = 36V, GVDD_X = 12V, RL = 4Ω, fS = 384kHz, ROC = 24kΩ, TC = 75°C, Output Filter: LDEM = 10μH, CDEM = 1 μF, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RL = 1.5 Ω, 10%, THD+N 400 RL = 2 Ω, 10% THD+N 300 RL = 4 Ω, 10% THD+N 160 PO Power output per channel W RL = 1.5 Ω, 1% THD+N 320 RL = 2 Ω, 1% THD+N 250 RL = 4 Ω, 1% THD+N 130 THD+N Total harmonic distortion + noise 1 W, 1 kHz signal 0.025 % Vn Output integrated noise A-weighted, AES17 measuring filter 180 μV VOS Output offset voltage No signal 10 20 mV SNR Signal to noise ratio(1) A-weighted, AES17 measuring filter 105 dB DNR Dynamic range A-weighted, –60 dBFS (rel 1% THD) 105 dB Power dissipation due to idle losses Pidle PO = 0, All channels switching (2) 1.0 W (IPVDD_X) (1) SNR is calculated relative to 1% THD-N output level. (2) Actual system idle losses are affected by core losses of output inductors. ELECTRICAL CHARACTERISTICS PVDD_X = 36V, GVDD_X = 12V, VDD = 12V, TC (Case temperature) = 75°C, fS = 384 kHz, unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INTERNAL VOLTAGE REGULATOR AND CURRENT CONSUMPTION Voltage regulator, only used as a DVDD VDD = 12 V 3.0 3.3 3.6 V reference node Voltage regulator, only used as a AVDD VDD = 12 V 7.8 V reference node Operating, 50% duty cycle 20 IVDD VDD supply current mA Idle, reset mode 20 50% duty cycle 12 IGVDD_X Gate-supply current per full-bridge mA Reset mode 3 50% duty cycle without load 15 IPVDD_X Full-bridge idle current RESET low 1.9 mA VDD and GVDD_X at 0V 0.4 OUTPUT-STAGE MOSFETs Drain-to-source resistance, low side RDS(on), LS 40 m Ω (LS) TJ = 25°C, excludes metallization resistance, GVDD = 12 V Drain-to-source resistance, high side RDS(on), HS 40 m Ω (HS) I/O PROTECTION Vuvp,GVDD 8.5 V Undervoltage protection limit, GVDD_X Vuvp,GVDD, hyst (1) 0.7 V Vuvp,VDD 8.5 V Undervoltage protection limit, VDD Vuvp,VDD, hyst (1) 0.7 V Vuvp,PVDD 8.5 V Undervoltage protection limit, PVDD_X Vuvp,PVDD,hyst (1) 0.7 V OTW(1) Overtemperature warning 115 125 135 °C Temperature drop needed below OTW OTWhyst (1) temperature for OTW to be inactive 25 °C after OTW event. OTE(1) Overtemperature error 145 155 165 °C (1) Specified by design. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TAS5624A |
Similar Part No. - TAS5624A_15 |
|
Similar Description - TAS5624A_15 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
