Low-Jitter, 800Mbps, 10-Port LVDS

Repeaters with 100

10

______________________________________________________________________________________

Figure 6. Power-Up/Down Delay Test Circuit

RIN+

1.05V

1.0V

1.05V

1.0V

RIN-

PWRDN

GENERATOR

50

Ω

DO1+

DO10+

DO10-

DO1-

1.2V

1.2V

RL

50

Ω

RL

50

Ω

RL

50

Ω

RL

50

Ω

5pF

5pF

5pF

5pF

MAX9153

MAX9154

Figure 7. Power-Up/Down Delay Waveforms

1.2V

1.2V

O

50%

50%

50%

50%

50%

50%

PWRDN

Test Circuits and Timing Diagrams (continued)