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MAX802SMJA Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX802SMJA Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 12 page Connecting an ordinary signal diode in series with R3, as shown in Figure 4b, causes the lower trip point (VL) to coincide with the trip point without hysteresis (VTRIP), so the entire hysteresis window occurs above VTRIP. This method provides additional noise margin without compromising the accuracy of the power-fail threshold when the monitored voltage is falling. It is useful for accurately detecting when a voltage falls past a threshold. The current through R1 and R2 should be at least 1µA to ensure that the 25nA (max over extended temperature range) PFI input current does not shift the trip point. R3 should be larger than 10k Ω so it does not load down the – P — F — O – pin. Capacitor C1 adds additional noise rejection. Monitoring an Additional Power Supply These µP supervisors can monitor either positive or negative supplies using a resistor voltage divider to PFI. – P — F — O – can be used to generate an interrupt to the µP (Figure 5). Connecting – P — F — O – to – M — R – on the MAX704 and MAX806 causes reset to assert when the monitored supply goes out of tolerance. Reset remains asserted as long as – P — F — O – holds – M — R – low, and for 200ms after – P — F — O – goes high. Interfacing to µPs with Bidirectional Reset Pins µPs with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with the MAX690_/ MAX704_/MAX802_/MAX806_ – R — E — S — E — T – output. If, for example, the – R — E — S — E — T – output is driven high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7k Ω resistor between the – R — E — S — E — T – output and the µP reset I/O, as in Figure 6. Buffer the – R — E — S — E — T – output to other system components. Negative-Going VCC Transients While issuing resets to the µP during power-up, power- down, and brownout conditions, these supervisors are relatively immune to short-duration negative-going VCC transients (glitches). It is usually undesirable to reset the µP when VCC experiences only small glitches. Figure 7 shows maximum transient duration vs. reset- comparator overdrive, for which reset pulses are not generated. The graph was produced using negative- going VCC pulses, starting at 3.3V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts for 40µs or less will not cause a reset pulse to be issued. A 100nF bypass capacitor mounted close to the VCC pin provides additional transient immunity. 3.0V/3.3V Microprocessor Supervisory Circuits _______________________________________________________________________________________ 9 MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VOUT TO STATIC RAM VBATT VCC GND 1N4148 RESET (RESET) ( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY TO µP 0.47F 3.0V OR 3.3V MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VOUT TO STATIC RAM VBATT VCC GND 1N4148 RESET (RESET) ( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY TO µP 0.47F 3.0V OR 3.3V +5V b a Figure 3. Using a SuperCap as a Backup Power Source |
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