Full-Featured µP Supervisory Circuit with

±1.5% Reset Accuracy

4

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Note 3: “+”= battery discharging current, “-”= battery charging current.

disabling the watchdog function.

Note 7: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT.

ELECTRICAL CHARACTERISTICS (continued)

CONDITIONS

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

PFI Leakage Current

±0.005

±40

nA

mV

20

PFI Hysteresis

µA

±0.00002

±1

CE IN Leakage Current

Disabled mode, MR = 0V

µs

14

PFI to PFO Delay (Note 5)

PFI Input Threshold

2.22

2.285

2.35

V

2.20

2.265

2.33

RESET to CE OUT Delay

28

µs

Ω

75

150

CE IN to CE OUT Resistance

(Note 6)

MR Minimum Pulse Input

1

µs

ns

170

MR-to-RESET Propagation

Delay

mA

17

CE OUT Short-Circuit Current

(RESET Active)

CE OUT = 0, MR = 0V

ns

28

CE IN to CE OUT

Propagation Delay (Note 7)

50

Ω source impedance driver

V

3.5

CE OUT Output Voltage High

(RESET Active)

Disabled mode, MR = 0V

MR Threshold

2.4

V

BATT OK Threshold

2.200

2.265

2.350

V

BATT OK Hysteresis

20

mV

Output Voltage

(PFO, BATT OK)

0.4

V

Output Short-Circuit Current

Output sink current

35

mA

0.8

Output source current

20

MR Pullup Current

MR = 0V

50

100

200

µA

CHIP-ENABLE GATING

MANUAL RESET INPUT

BATT OK COMPARATOR

LOGIC OUTPUTS