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AMC1304x Datasheet(PDF) 6 Page - Texas Instruments |
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AMC1304x Datasheet(HTML) 6 Page - Texas Instruments |
6 / 39 page 6 10 ) ( u ¸¸ ¹ · ¨¨ © § u TempRange value value value ppm TCE MIN MAX G TempRange value value TCE MIN MAX O AMC1304L05, AMC1304L25, AMC1304M05, AMC1304M25 SBAS655C – SEPTEMBER 2014 – REVISED SEPTEMBER 2015 www.ti.com 7.5 Electrical Characteristics: AMC1304x05 All minimum and maximum specifications are at TA = –40°C to 125°C, LDOIN = 4.0 V to 18.0 V, DVDD = 3.0 V to 5.5 V, AINP = –50 mV to 50 mV, AINN = 0 V, and sinc 3 filter with OSR = 256, unless otherwise noted. Typical values are at TA = 25°C, CLKIN = 20 MHz, LDOIN = 15.0 V, and DVDD = 3.3 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUTS Maximum differential voltage input range VClipping ±62.5 mV (AINP-AINN) Specified linear full-scale range FSR –50 50 mV (AINP-AINN) VCM Operating common-mode input range –0.032 1.2 V CID Differential input capacitance 2 pF IIB Input bias current Inputs shorted to AGND –97 –72 –57 μA RID Differential input resistance 5 k Ω IIO Input offset current ±5 nA CMTI Common-mode transient immunity 15 kV/ μs fIN = 0 Hz, –98 VCM min ≤ VIN ≤ VCM max CMRR Common-mode rejection ratio dB fIN from 0.1 Hz to 50 kHz, –85 VCM min ≤ VIN ≤ VCM max BW Input bandwidth 800 kHz DC ACCURACY DNL Differential nonlinearity Resolution: 16 bits –0.99 0.99 LSB INL Integral nonlinearity (1) Resolution: 16 bits –4 ±1.5 4 LSB EO Offset error Initial, at 25°C –50 ±2.5 50 µV TCEO Offset error thermal drift (2) –1.3 1.3 μV/°C EG Gain error Initial, at 25°C –0.3% –0.02% 0.3% TCEG Gain error thermal drift (3) –40 ±20 40 ppm/°C LDOIN from 4 V to 18 V, at dc –110 PSRR Power-supply rejection ratio dB LDOIN from 4 V to 18 V, from 0.1 Hz to –110 50 kHz AC ACCURACY SNR Signal-to-noise ratio fIN = 1 kHz 76 81.5 dB SINAD Signal-to-noise + distortion fIN = 1 kHz 76 81 dB THD Total harmonic distortion fIN = 1 kHz –90 –81 dB SFDR Spurious-free dynamic range fIN = 1 kHz 81 90 dB DIGITAL INPUTS/OUTPUTS External Clock fCLKIN Input clock frequency 5 20 20.1 MHz DutyCLKIN Duty cycle 5 MHz ≤ fCLKIN ≤ 20.1 MHz 40% 50% 60% (1) Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer function expressed as a number of LSBs or as a percent of the specified linear full-scale range (FSR). (2) Offset error drift is calculated using the box method, as described by the following equation: (3) Gain error drift is calculated using the box method, as described by the following equation: 6 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: AMC1304L05 AMC1304L25 AMC1304M05 AMC1304M25 |
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