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US12231 Datasheet(PDF) 2 Page - Unisonic Technologies |
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US12231 Datasheet(HTML) 2 Page - Unisonic Technologies |
2 / 15 page US12231 Preliminary CMOS IC UNISONICTECHNOLOGIESCO.,LTD 2 of 15 www.unisonic.com.tw QW-R502-A82.a MARKING INFORMATION PACKAGE MARKING TSSOP-20 PIN CONFIGURATION PIN DESCRIPTION PIN NO. PIN NAME I/O DESCRIPTION 1 SYSRST I System Reset input – active low, logic level signal. Internally pulled up to AUXIN. 2 SHDN I Shutdown input – active low, logic level signal. Internally pulled up to AUXIN. 3 STBY I Standby input – active low, logic level signal. Internally pulled up to AUXIN. 4, 5 3.3VIN I 3.3-V input for 3.3VOUT 6, 7 3.3VOUT O Switched output that delivers 0 V, 3.3 V or high impedance to card 8 PERST O A logic level power good to slot 0 (with delay) 9 NC No connection 10 GND Ground 11 CPUSB I Card Present input for USB cards. Internally pulled up to AUXIN. 12 CPPE I Card Present input for PCI Expresscards TM. Internally pulled up to AUXIN 13, 14 1.5VOUT O Switched output that delivers 0 V, 1.5 V or high impedance to card 15,16 1.5VIN I 1.5-V input for 1.5VOUT 17 AUXOUT O Switched output that delivers 0 V, AUX or high impedance to card 18 AUXIN I AUX input for AUXOUT and chip power 19 RCLKEN I/O Reference Clock Enable signal. As an output, a logic level power good to host for slot 0 (no delay – open drain). As an input, if kept inactive (low) by the host, prevents PERST from being de-asserted. Internally pulled up to AUXIN. 20 OC O Overcurrent status output for slot 0 (open drain) |
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