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UCC27528-Q1 Datasheet(PDF) 10 Page - Texas Instruments |
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UCC27528-Q1 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 29 page 1 ENA 500 k V DD 2 INA 465 k 3 GND 4 INB 465 k UVLO 8 7 6 5 ENB OUTA VDD OUTB 500 k V DD V DD V DD V DD V DD UCC27528-Q1 SNVSA89A – DECEMBER 2014 – REVISED MAY 2015 www.ti.com 8 Detailed Description 8.1 Overview The UCC27528-Q1 device represents Texas Instruments’ latest generation of dual-channel, low-side high-speed gate driver devices featuring 5-A source- and sink current capability, industry best-in-class switching characteristics, and many other features listed in Table 1 all of which combine to provide efficient, robust, and reliable operation in high-frequency switching power circuits. Table 1. UCC27528-Q1 Features and Benefits FEATURE BENEFIT Best-in-class 13-ns (typical) propagation delay Extremely low pulse-transmission distortion Ease of paralleling outputs for higher (2×) current capability, ease of 1-ns (typical) delay matching between channels driving parallel power switches Expanded VDD operating range of 4.5 V to 18 V Flexibility in system design Expanded operating temperature range of –40 °C to 140 °C (See the Electrical Characteristics table) Outputs are held low in UVLO condition, which ensures predictable, VDD UVLO protection glitch-free operation at power up and power down Feature which is specifically useful in passing abnormal condition Outputs held low when the input pins (INx) are in floating condition tests during certification Pin-to-pin compatibility with the UCC2732x family of device from TI, Outputs enabled when the enable pins (ENx) are in floating condition in designs where pin 1 and pin 8 are in the floating condition Enhanced noise immunity, higher threshold leve,l and wider CMOS input threshold logic hysteresis which is a function of the VDD supply voltage and ability to employ RCD delay circuits on input pins. The input and enable pins are able to handle voltage levels not System simplification, specifically related to auxiliary bias supply restricted by VDD pin bias voltage architecture 8.2 Functional Block Diagram 10 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: UCC27528-Q1 |
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