UCC27512-EP

www.ti.com

SLUSBE3 – JUNE 2013

SINGLE CHANNEL HIGH-SPEED, LOW-SIDE GATE DRIVER

(WITH 4-A PEAK SOURCE AND 8-A PEAK SINK)

Check for Samples: UCC27512-EP

1

FEATURES

•

Low-Cost, Gate-Driver Device Offering

SUPPORTS DEFENSE, AEROSPACE,

Superior Replacement of NPN and PNP

AND MEDICAL APPLICATIONS

Discrete Solutions

•

Controlled Baseline

•

4-A Peak Source and 8-A Peak Sink

•

One Assembly and Test Site

Asymmetrical Drive

•

One Fabrication Site

•

Strong Sink Current Offers Enhanced

•

Available in Military (–55°C to 125°C)

Immunity Against Miller Turn On

Temperature Range

•

Fast Propagation Delays (13-ns typical)

•

Extended Product Life Cycle

•

Fast Rise and Fall Times (9-ns and 7-ns

•

Extended Product-Change Notification

typical)

•

Product Traceability

•

4.5-V to 18-V Single Supply Range

•

Outputs Held Low During VDD UVLO (ensures

DESCRIPTION

glitch free operation at power-up and power-

The UCC27512 single-channel, high-speed, low-side

down)

gate driver device is capable of effectively driving

•

TTL and CMOS Compatible Input Logic

MOSFET and IGBT power switches. Using a design

Threshold, (independent of supply voltage)

that

inherently

minimizes

shoot-through

current,

UCC27512 is capable of sourcing and sinking high,

•

Hysteretic Logic Thresholds for High Noise

peak-current pulses into capacitive loads offering rail-

Immunity

to-rail

drive

capability

and

extremely

small

•

Dual Input Design (choice of an inverting (IN-

propagation delay typically 13 ns.

pin) or non-inverting (IN+ pin) driver

The UCC27512 provides 4-A source, 8-A sink

configuration)

(asymmetrical drive) peak-drive current capability.

–

Unused Input Pin can be Used for Enable

Strong sink capability in asymmetrical drive boosts

or Disable Function

immunity against parasitic, Miller turn-on effect.

•

Output Held Low when Input Pins are Floating

UCC27512 is designed to operate over a wide VDD

•

Input Pin Absolute Maximum Voltage Levels

range of 4.5 V to 18 V and wide temperature range of

Not Restricted by VDD Pin Bias Supply

-55°C to 125°C. Internal Under Voltage Lockout

Voltage

(UVLO) circuitry on VDD pin holds output low outside

VDD operating range. The capability to operate at low

•

6-Pin DRS (3mm x 3 mm WSON with exposed

voltage levels such as below 5 V, along with best in

thermal pad) Package

class switching characteristics, is especially suited for

driving emerging wide band-gap power switching

APPLICATIONS

devices such as GaN power semiconductor devices.

•

Switch-Mode Power Supplies

•

DC-to-DC Converters

•

Companion Gate Driver Devices for Digital

Power Controllers

•

Solar Power, Motor Control, UPS

•

Gate Driver for Emerging Wide Band-Gap

Power Devices (such as GaN)

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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.