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CC3200R1M2RGCR Datasheet(PDF) 6 Page - Texas Instruments |
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CC3200R1M2RGCR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 71 page CC3200 SWAS032F – JULY 2013 – REVISED FEBRUARY 2015 www.ti.com 3 Terminal Configuration and Functions Figure 3-1 shows pin assignments for the 64-pin QFN package. Figure 3-1. QFN 64-Pin Assignments (Top View) 3.1 Pin Attributes and Pin Multiplexing The device makes extensive use of pin multiplexing to accommodate the large number of peripheral functions in the smallest possible package. To achieve this configuration, pin multiplexing is controlled using a combination of hardware configuration (at device reset) and register control. NOTE TI highly recommends using the CC3200 pin multiplexing utility to obtain the desired pinout. The board and software designers are responsible for the proper pin multiplexing configuration. Hardware does not ensure that the proper pin multiplexing options are selected for the peripherals or interface mode used. Table 3-1 describes the general pin attributes and presents an overview of pin multiplexing. All pin multiplexing options are configurable using the pin mux registers. The following special considerations apply: • All I/Os support drive strengths of 2, 4, and 6 mA. Drive strength is configurable individually for each pin. • All I/Os support 10-µA pullups and pulldowns. • These pulls are not active and all of the I/Os remain floating while the device is in Hibernate state. • The VIO and VBAT supply must be tied together at all times. • All digital I/Os are nonfail-safe. 6 Terminal Configuration and Functions Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC3200 |
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