are supported. RESTART protocol is supported, but an

immediate STOP condition is necessary to update the

DAC. The 8th bit of the address byte, typically used to

indicate a read or write protocol, is used in the MAX5380/

MAX5381/MAX5382 to enter or exit shutdown mode.

When MAX5380/MAX5381/MAX5382 are addressed in

Applications Information

Digital Inputs and Interface Logic

The serial 2-wire interface has logic levels defined as

Schmitt trigger buffers to accept slow-transition inter-

faces. This means that optocouplers can interface

directly to the MAX5380/MAX5381/MAX5382 without

additional external logic. The digital inputs are compati-

ble with CMOS logic levels and must not be driven with

Power-Supply Bypassing and Layout

Careful printed circuit board layout is important for best

system performance. To reduce crosstalk and noise

injection, keep analog and digital signals separate.

Ensure that the ground return from GND to the supply

ground is short and low impedance; a ground plane is

ground as close as possible to the device. If the supply

is excessively noisy, connect a 10

Ω resistor in series

tance.

Low-Cost, Low-Power, 8-Bit DACs with

2-Wire Serial Interface in SOT23

______________________________________________________________________________________

11

µC

SDA SCL

OFFSET ADJUSTMENT

THRESHOLD ADJUSTMENT

GAIN ADJUSTMENT

SCL

SDA

OUT

MAX5380L

2V REFERENCE

SCL

SDA

OUT

MAX5381M

4V REFERENCE

SCL

SDA

OUT

MAX5382N

TRANSISTOR COUNT: 2910

Chip Information