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MAX5250AEPP Datasheet(PDF) 8 Page - Maxim Integrated Products |
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MAX5250AEPP Datasheet(HTML) 8 Page - Maxim Integrated Products |
8 / 16 page Low-Power, Quad, 10-Bit Voltage-Output DAC with Serial Interface 8 _______________________________________________________________________________________ _______________Detailed Description The MAX5250 contains four 10-bit, voltage-output digi- tal-to-analog converters (DACs) that are easily addressed using a simple 3-wire serial interface. It includes a 16-bit data-in/data-out shift register, and each DAC has a doubled-buffered input composed of an input register and a DAC register (see Functional Diagram). In addition to the four voltage outputs, each amplifier’s negative input is available to the user. The DACs are inverted R-2R ladder networks that con- vert a digital input (10 data bits plus 2 sub-bits) into equivalent analog output voltages in proportion to the applied reference voltage inputs. DACs A and B share the REFAB reference input, while DACs C and D share the REFCD reference input. The two reference inputs allow different full-scale output voltage ranges for each pair of DACs. Figure 1 shows a simplified circuit dia- gram of one of the four DACs. Reference Inputs The two reference inputs accept positive DC and AC signals. The voltage at each reference input sets the full-scale output voltage for its two corresponding DACs. The reference input voltage range is 0V to (VDD - 1.4V). The output voltages (VOUT_) are repre- sented by a digitally programmable voltage source as: VOUT_ = (VREF x NB / 1024) x Gain where NB is the numeric value of the DAC’s binary input code (0 to 1023), VREF is the reference voltage, and Gain is the externally set voltage gain. The impedance at each reference input is code depen- dent, ranging from a low value of 10k Ω when both DACs connected to the reference have an input code of 554 hex, to a high value exceeding several giga ohms (leakage currents) with an input code of 000 hex. Because the input impedance at the reference pins is code dependent, load regulation of the reference source is important. The REFAB and REFCD reference inputs have a 10k Ω guaranteed minimum input impedance. When the two reference inputs are driven from the same source, the effective minimum impedance is 5k Ω. A voltage refer- ence with a load regulation of 6ppm/mA, such as the MAX873, would typically deviate by 0.006LSB (0.015LSB worst case) when driving both MAX5250 reference inputs simultaneously at 2.5V. Driving the REFAB and REFCD pins separately improves reference accuracy. In shutdown mode, the MAX5250’s REFAB and REFCD inputs enter a high-impedance state with a typical input leakage current of 0.01µA. The reference input capacitance is also code depen- dent and typically ranges from 20pF with an input code of all 0s to 100pF at full scale. Output Amplifiers All MAX5250 DAC outputs are internally buffered by pre- cision amplifiers with a typical slew rate of 0.6V/µs. Access to each output amplifier’s inverting input provides the user greater flexibility in output gain setting/ signal conditioning (see the Applications Information section). With a full-scale transition at the MAX5250 output, the typical settling time to ±1/2LSB is 10µs when loaded with 5k Ω in parallel with 100pF (loads less than 2kΩ degrade performance). The MAX5250 output amplifier’s output dynamic responses and settling performances are shown in the Typical Operating Characteristics. Power-Down Mode The MAX5250 features a software-programmable shut- down that reduces supply current to a typical value of 10µA. The power-down lockout pin ( PDL) must be high to enable shutdown mode. Writing 1100XXXXXXXXXXXX as the input-control word puts the MAX5250 in power-down mode (Table 1). OUT_ FB_ SHOWN FOR ALL 1s ON DAC S0 S1 D0 D9 2R 2R 2R 2R 2R RR R REF_ AGND Figure 1. Simplified DAC Circuit Diagram |
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