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ICS849S625I Datasheet(PDF) 10 Page - Integrated Device Technology |
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ICS849S625I Datasheet(HTML) 10 Page - Integrated Device Technology |
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10 / 24 page  ICS849S625BYI REVISION A OCTOBER 1, 2012 10 ©2012 Integrated Device Technology, Inc. ICS849S625I Data Sheet CRYSTAL-TO-LVPECL/LVDS CLOCK SYNTHESIZER Parameter Measurement Information LVPECL Output Load AC Test Circuit RMS Phase Jitter LVPECL Output Rise/Fall Time LVDS Output Load AC Test Circuit Cycle-to-Cycle Jitter LVDS Output Rise/Fall Time SCOPE Qx nQx V EE VCC, VCCA 2V -1.3V±0.165V VCCO 2V Offset Frequency f 1 f 2 Phase Noise Plot Area Under Curve Defined by the Offset Frequency Markers RMS Phase Jitter = 2 * * ƒ 1 * 10% 90% 90% 10% tR t F VSWING nQAx, nQBx, nQCx QAx, QBx, QCx SCOPE Qx nQx 3.3V±5% POWER SUPPLY +– Float GND VCC, VCCO VCCA ➤ ➤ tcycle n tcycle n+1 tjit(cc) = |tcycle n – tcycle n+1| 1000 Cycles nQAx, nQBx, nQCx QAx, QBx, QCx 10% 90% 90% 10% tR t F VOD nQAx, nQBx, nQCx QAx, QBx, QCx |
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