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ICS849S625I Datasheet(PDF) 4 Page - Integrated Device Technology |
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ICS849S625I Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 24 page ICS849S625BYI REVISION A OCTOBER 1, 2012 4 ©2012 Integrated Device Technology, Inc. ICS849S625I Data Sheet CRYSTAL-TO-LVPECL/LVDS CLOCK SYNTHESIZER Table 2. Pin Characteristics Function Tables Table 3A. SEL_OUT Function Table Table 3E. MR Function Table Table 3B. SELA Function Table Table 3F. BYPASS Function Table Table 3C. SELB Function Table Table 3D. SELC Function Table Symbol Parameter Test Conditions Minimum Typical Maximum Units CIN Input Capacitance 2 pF RPULLUP Input Pullup Resistor 51 k RPULLDOWN Input Pulldown Resistor 51 k Input Output Levels SEL_OUT 0 (default) LVDS 1 LVPECL Input Device Function MR 0 (default) Normal 1Master Reset Inputs NA Bank A Output Divider SELA0 SELA1 0 (default) 0 (default) ÷1 01 ÷2 10 ÷4 11 ÷5 Input Device Function BYPASS 0 (default) PLL mode. The output frequency is the VCO frequency divided by the selected output divider. 1 Bypass mode. The output frequency is the REF_CLK frequency divided by two and then divided by the selected output divider. Inputs NB Bank B Output Divider SELB0 SELB1 0 (default) 0 (default) ÷1 01 ÷2 10 ÷4 11 ÷5 Inputs NC Bank C Output Divider SELC0 SELC1 0 (default) 0 (default) ÷1 01 ÷2 10 ÷4 11 ÷5 |
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