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8T49NS010 Datasheet(PDF) 4 Page - Integrated Device Technology |
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8T49NS010 Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 35 page 8T49NS010 DATA SHEET CLOCK SYNTHESIZER AND FANOUT BUFFER/DIVIDER 4 REVISION 1 11/19/14 13 N0 Input Pullup Output Divider. Refer to Table 4C. 14 N1 Input Pullup Output Divider. Refer to Table 4C. 15 VDD_CP Power Power Supply Voltage to Charge Pump (3.3V). 16 CP Output Charge Pump. 17 VSS_CP Power Power Supply Ground for Charge Pump - Return for VDD_CP. 18 VDD_FB Power Power Supply Voltage to Feedback Divider (3.3V). 19 VSS_FB Power Power Supply Ground to Feedback Divider (3.3V). Return for VDD_FB. 20 VDD_LC_IN Power Power Supply Voltage for LC Interface. (3.3V). 21 VSS_A2 Power Power Supply Ground for VCO. 22 VDD_A2 Power Power Supply Voltage for VCO. 23 BIAS_CAP Bias Capacitor. 24 BIAS_CAPR Bias Capacitor Return. 25 Loop_Filter_R Loop Filter Return. 26 Loop_Filter Loop Filter Capacitor. 27 VEE_A Power Power Supply ground for VCO. Return for VDD_A pin 28. 28 VDD_A Power Power Supply for VCO. 29 NC Unused No internal connection. 30 NC Unused No internal connection. 31 nQCLK5 Output Differential clock output pair. FORMAT #1 or FORMAT #2 output levels. 32 QCLK5 Output 33 nQCLK6 Output Differential clock output pair. FORMAT #1 or FORMAT #2 output levels. 34 QCLK6 Output 35 VDD_CLK Power Power Supply Voltage (3.3V). 36 nQCLK7 Output Differential clock output pair. FORMAT #1 or FORMAT #2 output levels. 37 QCLK7 Output 38 nQCLK8 Output Differential clock output pair. FORMAT #1 or FORMAT #2 output levels. 39 QCLK8 Output 40 VDD_CLK Power Power Supply Voltage (3.3V). 41 nQCLK9 Output Differential clock output pair. FORMAT #1 or FORMAT #2 output levels. 42 QCLK9 Output 43 VSS_I2C Power Power Supply Ground for I2C. Return for Pin 48 VDD_I2C. 44 SCLK Input Pullup I2C clock input. LVCMOS interface levels. 45 SDATA I/O Pullup I2C data Input/Output: LVCMOS interface levels. Open Drain Pin. Table 1. Pin Descriptions1 (Continued) Number Name Type Description |
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