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5P49V5935 Datasheet(PDF) 3 Page - Integrated Device Technology |
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5P49V5935 Datasheet(HTML) 3 Page - Integrated Device Technology |
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3 / 33 page  REVISION B 07/13/15 3 PROGRAMMABLE CLOCK GENERATOR 5P49V5935 PRELIMINARY DATASHEET Table 1: Pin Descriptions Number Name Description 1 CLKIN Input Pull-down Differential clock input. Weak 100kohms internal pull-down. 2 CLKINB Input Pull-down Complementary differential clock input. Weak 100kohms internal pull-down. 3 NC -- No connect. 4 NC -- No connect. 5 VDDA Power Analog functions power supply pin. Connect to 1.8V to 3.3V. VDDA and VDDD should have the same voltage applied. 6 CLKSEL Input Pull-down Input clock select. Selects the active input reference source, when in Manual switchover mode. 0 = Integrated crystal (default) 1 = CLKIN, CLKINB CLKSEL Polarity can be changed by I2C programming as shown in Table 4. 7 SD/OE Input Pull-down Enables/disables the outputs (OE) or powers down the chip (SD). The SH bit controls the configuration of the SD/OE pin. The SH bit needs to be high for SD/OE pin to be configured as SD. The SP bit (0x02) controls the polarity of the signal to be either active HIGH or LOW only when pin is configured as OE (Default is active LOW.) Weak internal pull down resistor. When configured as SD, device is shut down, differential outputs are driven high/low, and the single- ended LVCMOS outputs are driven low. When configured as OE, and outputs are disabled, the outputs can be selected to be tri-stated or driven high/low, depending on the programming bits as shown in the SD/OE Pin Function Truth table. 8 SEL1/SDA Input Pull-down Configuration select pin, or I2C SDA input as selected by OUT0_SEL_I2CB. Weak internal pull down resistor. 9 SEL0/SCL Input Pull-down Configuration select pin, or I2C SCL input as selected by OUT0_SEL_I2CB. Weak internal pull down resistor. 10 VDDO4 Power Output power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT4/OUT4B. 11 OUT4 Output Output Clock 4. Please refer to the Output Drivers section for more details. 12 OUT4B Output Complementary Output Clock 4. Please refer to the Output Drivers section for more details. 13 OUT3B Output Complementary Output Clock 3. Please refer to the Output Drivers section for more details. 14 OUT3 Output Output Clock 3. Please refer to the Output Drivers section for more details. 15 VDDO3 Power Output power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT3/OUT3B. 16 OUT2B Output Complementary Output Clock 2. Please refer to the Output Drivers section for more details. 17 OUT2 Output Output Clock 2. Please refer to the Output Drivers section for more details. 18 VDDO2 Power Output power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT2/OUT2B. 19 OUT1B Output Complementary Output Clock 1. Please refer to the Output Drivers section for more details. 20 OUT1 Output Output Clock 1. Please refer to the Output Drivers section for more details. 21 VDDO1 Power Output power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT1/OUT1B. 22 VDDD Power Digital functions power supply pin. Connect to 1.8 to 3.3V. VDDA and VDDB should have the same voltage applied. 23 VDDO0 Power Power supply pin for OUT0_SEL_I2CB. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT0. 24 OUT0_SELB_I2C Input/Output Pull-down Latched input/LVCMOS Output. At power up, the voltage at the pin OUT0_SEL_I2CB is latched by the part and used to select the state of pins 8 and 9. If a weak pull up (10Kohms) is placed on OUT0_SEL_I2CB, pins 8 and 9 will be configured as hardware select pins, SEL1 and SEL0. If a weak pull down (10Kohms) is placed on OUT0_SEL_I2CB or it is left floating, pins 8 and 9 will act as the SDA and SCL pins of an I2C interface. After power up, the pin acts as a LVCMOS reference output which is the same frequency as the input reference. At default, 25MHz integrated crystal is used so OUT0 will also be 25MHz. ePAD VEE Power Connect to ground pad. Type |
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