It also determines power-up sequencing when several

converters are used.

Upon power turn-on, the SS pin acts as a current sink

to reset any capacitance attached to it. Once REF has

exceeded its lockout value, SS sources a current to the

external capacitor, allowing the converter output volt-

age to ramp up. Full output voltage is reached in

approximately 0.45s/µF.

The SS pin is an overriding extra input to the PWM

the duty cycle is decided by the PWM comparator.

Oscillator and Ramp Generator

The MAX5003 oscillator generates the ramp used by

the comparator, which in turn generates the PWM digi-

tal signal. It also controls the maximum on-time feature

of the controller. The oscillator can operate in two

modes: free running and synchronized (sync). A single

pin, FREQ, doubles as the attachment point for the fre-

quency programming resistor and as the synchroniza-

tion input. The mode recognition is automatic, based on

the voltage level at the FREQ pin.

In free-running mode, a 1.25V source is internally

applied to the pin; the oscillator frequency is propor-

tional to the current out of the pin through the program-

ming resistor, with a proportionality constant of

16kHz/µA.

In sync mode, the signal from the external master gen-

erator must be a digital rectangular waveform running

at four times the desired converter switching frequency.

Minimum acceptable signal pulse width is 150ns, posi-

tive or negative, and the maximum frequency is

1.2MHz.

When the voltage at FREQ is forced above 2.7V, the

oscillator goes into sync mode. If left at or below 1.5V for

more than 8µs to 20µs, it enters free-running mode.

The master clock generator cannot be allowed to stop

at logic zero. If the system design forces such a situa-

tion, an inverter must be used at the FREQ pin.

In sync mode, the oscillator signal is divided by four and

decoded. The output driver is blocked during the last

phase of the division cycle, giving a hardwired maximum

on-time of 75%. In free-running mode, the oscillator duty

cycle is 75% on, and the off portion also blocks the out-

put driver. The maximum on-time is then absolutely limit-

ed to 75% in either mode. Maximum on-time can be

controlled to values lower than 75% by a programming

resistor at the MAXTON pin.

The PWM ramp generated goes from 0.5V min to 2.5V

max, and the maximum time on is the time it takes from

low to high.

must be connected from MAXTON to AGND, to pro-

gram the maximum on-time.

age limits are fixed, controlling the ramp slope sets the

maximum time on.

also changes the duty cycle and the energy transferred to

the load per cycle of the converter. The INDIV signal is a

fraction of the input voltage, so the fast input voltage feed-

forward works by modifying the duty cycle in the same

clock period, in response to an input voltage change.

Calculate the maximum duty cycle as:

where:

MAXTON = Maximum on-time

T = Switching period

Then:

where:

MAXTON can then be calculated as:

N-Channel MOSFET

Output Switch Driver

The MAX5003 output drives an N-channel MOSFET

transistor. The output sources and sinks relatively large

currents, supplying the gate with the charge the tran-

sistor needs to switch. These are current spikes only,

since after the switching transient is completed the load

is a high-value resistance. The current is supplied from

MAXTON

RV

k

V

kHz

MAXTON

INDIV

=

Ω

⋅⋅

⋅⋅

075

1 25

200

100

.

.

D

0.75 100

R

200k

1.25V

V

100kHz

MAX

MAXTON

INDIV

SW

=

⋅

Ω

















ƒ









D

MAXTON

T

High-Voltage PWM

Power-Supply Controller

10

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