High-Speed, Low-Voltage, CMOS Analog

Multiplexers/Switches

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11

50%

0

0

90%

90%

50%

0

0

90%

90%

50%

0

0

90%

90%

GND

B

A

C

ENABLE

X0

X1–X7

X

MAX4617

300

Ω

50

Ω

35pF

GND

B

A

ENABLE

X1, X2, Y1,

Y2. X3, Y3

X, Y

MAX4618

300

Ω

50

Ω

35pF

GND

A, B, C

ENABLE

X1, Y1, Z1

X2, Y2, Z2

X, Y, Z

MAX4619

300

Ω

50

Ω

35pF

TEST EACH SECTION INDIVIDUALLY.

Figure 2. Address Transition Times

______________________________________________Test Circuits/Timing Diagrams