a small-signal diode (D1) as shown in Figure 1. If the

analog signal can dip below GND, add D2. Adding

protection diodes reduces the analog range to a diode

drop (about 0.7V) below V+ (for D1), and a diode drop

above ground (for D2). On-resistance increases slightly

at low supply voltages. Maximum supply voltage (V+)

must not exceed +6V.

Adding protection diode D2 causes the logic threshold

to be shifted relative to GND. TTL compatibility is not

guaranteed when D2 is added.

Protection diodes D1 and D2 also protect against some

overvoltage situations. With Figure 1’s circuit, if the sup-

ply voltage is below the absolute maximum rating, and

if a fault voltage up to the absolute maximum rating is

applied to an analog signal pin, no damage will result.

1

Ω, Low-Voltage, Single-Supply

SPDT Analog Switches

_______________________________________________________________________________________

7

tr < 5ns

tf < 5ns

50%

LOGIC

INPUT

50

Ω

COM

GND

IN

(

)

0V

NO

OR NC

SWITCH

OUTPUT

LOGIC

INPUT

LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES

THAT HAVE THE OPPOSITE LOGIC SENSE.

V+

35pF

V+

MAX4624

MAX4625

Figure 2. Switching Time

Test Circuits/Timing Diagrams

50%

LOGIC

INPUT

LOGIC

INPUT

50

Ω

GND

NO

IN

NC

V+

V+

35pF

COM

MAX4624

Figure 3a. Break-Before-Make Interval (MAX4624 only)