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MAX4513CSE Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX4513CSE Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 16 page Quad, Rail-to-Rail, Fault-Protected, SPST Analog Switches _______________________________________________________________________________________ 9 Overview of MAX4511/MAX4512/MAX4513 The MAX4511/MAX4512/MAX4513 differ considerably from traditional fault-protection switches, with several advantages. First, they are constructed with two paral- lel FETs, allowing very low on-resistance when the switch is on. Second, they allow signals on the NC_ or NO_ pins that are within or slightly beyond the supply rails to be passed through the switch to the COM termi- nal, allowing rail-to-rail signal operation. Third, when a signal on NC_ or NO_ exceeds the supply rails by about 50mV (a fault condition), the voltage on COM_ is limited to the appropriate polarity supply voltage. Operation is identical for both fault polarities. The fault- protection extends to ±36V from GND. During a fault condition, the NO_ or NC_ input pin becomes high impedance regardless of the switch state or load resistance. If the switch is on, the COM_ output current is furnished from the V+ or V- pin by “booster” FETs connected to each supply pin. These FETs can typically source or sink up to 10mA. When power is removed, the fault protection is still in effect. In this case, the NO_ or NC_ terminals are a vir- tual open circuit. The fault can be up to ±40V. The COM_ pins are not fault protected; they act as nor- mal CMOS switch pins. If a voltage source is connect- ed to any COM_ pin, it should be limited to the supply voltages. Exceeding the supply voltage will cause high currents to flow through the ESD protection diodes, possibly damaging the device (see Absolute Maximum Ratings). Pin Compatibility These switches have identical pinouts to common non- fault-protected CMOS switches. Care should be exer- cised in considering them for direct replacements in existing printed circuit boards, however, since only the NO_ and NC_ pins of each switch are fault protected. Internal Construction Internal construction is shown in Figure 1, with the ana- log signal paths shown in bold. A single normally open V+ NO_ (NC_) IN_ GND V- HIGH FAULT LOW FAULT ON N1 P1 P2 COM_ N2 NC SWITCH -ESD DIODE NORMALLY OPEN SWITCH CONSTRUCTION Figure 1. Block Diagram |
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