Rail-to-Rail, Fault-Protected,

SPST Analog Switches

_______________________________________________________________________________________

9

Normal Operation

Two comparators continuously compare the voltage on

the NO (or NC) pin with V+ and V-. When the signal on

NO or NC is between V+ and V-, the switch acts nor-

mally, with FETs N1 and P1 turning on and off in

response to IN signals. The parallel combination of N1

and P1 forms a low-value resistor between NO (or NC)

and COM so that signals pass equally well in either

direction.

Positive Fault Condition

When the signal on NO (or NC) exceeds V+ by about

50mV, the high-fault comparator output is high, turning

off FETs N1 and P1. This makes the NO (or NC) pin

high impedance regardless of the switch state. If the

switch state is “off,” all FETs are turned off and both NO

(or NC) and COM are high impedance. If the switch

state is “on,” FET P2 is turned on, sourcing current from

V+ to COM.

Negative Fault Condition

When the signal on NO (or NC) exceeds V- by about

50mV, the low-fault comparator output is high, turning

off FETs N1 and P1. This makes the NO (or NC) pin

high impedance regardless of the switch state. If the

switch state is “off,” all FETs are turned off and both NO

(or NC) and COM are high impedance. If the switch

state is “on,” FET N2 is turned on, sinking current from

COM to V-.

Transient Fault Response and Recovery

When a fast rise-time and fall-time transient on IN

exceeds V+ or V-, the output (COM) follows the input (IN)

to the supply rail with only a few nanoseconds delay.

This delay is due to the switch on-resistance and circuit

capacitance to ground. When the input transient returns

to within the supply rails, however, there is a longer out-

put recovery time delay. For positive faults, the recovery

time is typically 3.5µs. For negative faults, the recovery

time is typically 1.3µs. These values depend on the COM

output resistance and capacitance. The delays are not

dependent on the fault amplitude. Higher COM output

resistance and capacitance increase recovery times.

COM and IN Pins

FETs N2 and P2 can source about ±13mA from V+ or V-

to the COM pin in the fault condition. Ensure that if the

COM pin is connected to a low-resistance load, the

absolute maximum current rating of 30mA is never

exceeded, both in normal and fault conditions.

The GND, COM, and IN pins do not have fault protec-

tion. Reverse ESD-protection diodes are internally con-

nected between GND, COM, IN, and both V+ and V-. If a

signal on GND, COM, or IN exceeds V+ or V- by more

than 300mV, one of these diodes will conduct heavily.

During normal operation these reverse-biased ESD

diodes leak a few nanoamps of current to V+ and V-.

Fault-Protection Voltage and Power Off

The maximum fault voltage on the NC or NO pins is

±36V with power applied and ±40V with power off.

Failure Modes

The MAX4510/MAX4520 are not lightning arrestors or

surge protectors.

Exceeding the fault-protection voltage limits on NO or

NC, even for very short periods, can cause the device

to fail.

Ground

There is no connection between the analog signal path

and GND. The analog signal path consists of an N-

channel and P-channel MOSFET with their sources and

drains paralleled and their gates driven out of phase to

V+ and V- by the logic-level translators.

V+ and GND power the internal logic and logic-level

translators and set the input logic thresholds. The logic-

level translators convert the logic levels to switched V+

and V- signals to drive the gates of the analog switch.

This drive signal is the only connection between the

power supplies and the analog signal. GND, IN, and

COM have ESD-protection diodes to V+ and V-.

IN Logic-Level Thresholds

The logic-level thresholds are CMOS and TTL compati-

ble when V+ is +15V. As V+ is raised, the threshold

increases slightly, and when V+ reaches 25V, the level

threshold is about 2.8V—above the TTL output high-

level minimum of 2.4V, but still compatible with CMOS

outputs (see Typical Operating Characteristics).

Increasing V- has no effect on the logic-level thresholds,

but it does increase the gate-drive voltage to the signal

FETs, reducing their on-resistance.

Dual Supplies

The MAX4510/MAX4520 operate with dual supplies

between ±4.5V and ±20V. The V+ and V- supplies

need not be symmetrical, but their difference cannot

exceed the absolute maximum rating of 44V.

Single Supply

The MAX4510/MAX4520 operate from a single supply

between +9V and +36V when V- is connected to GND.