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IDT8SLVP1102I Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT8SLVP1102I Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 22 page IDT8SLVP1102ANLI REVISION A FEBRUARY 25, 2014 2 ©2014 Integrated Device Technology, Inc. IDT8SLVP1102I Data Sheet LOW PHASE NOISE, 1-TO-2, 3.3V, 2.5V LVPECL OUTPUT FANOUT BUFFER Pin Descriptions and Characteristics Table 1. Pin Descriptions NOTE: Pulldown and Pullup refers to an internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Number Name Type Description 1, 16 VEE Power Negative supply pins. 2, 3, 4, 13, 14, 15 nc Unused Do not connect. 5VCC Power Power supply pin. 6 PCLK Input Pulldown Non-inverting differential LVPECL clock/data input. 7 nPCLK Input Pullup/ Pulldown/ Inverting differential LVPECL clock/data input. VCC/2 default when left floating. 8VREF Output Bias voltage reference for the PCLK input. 9, 10 Q0, nQ0 Output Differential output pair 0. LVPECL interface levels. 11, 12 Q1, nQ1 Output Differential output pair 1. LVPECL interface levels. Symbol Parameter Test Conditions Minimum Typical Maximum Units CIN Input Capacitance 2 pF RPULLDOWN Input Pulldown Resistor 51 k RPULLUP Input Pullup Resistor 51 k |
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