power supply with a 0.1µF ceramic capacitor placed

bypass each supply to ground.

Good layout improves performance by decreasing the

amount of stray capacitance and noise at the op amp’s

inputs and output. To decrease stray capacitance, min-

imize PC board trace lengths and resistor leads, and

place external components close to the op amp’s pins.

TRANSISTOR COUNTS:

MAX4250/MAX4251/MAX4255/MAX4256: 170

MAX4249/MAX4252/MAX4253/MAX4257: 340

MAX4254: 680

SOT23, Single-Supply, Low-Noise,

Low-Distortion, Rail-to-Rail Op Amps

______________________________________________________________________________________

11

160

140

0

10

10,000

60

20

40

120

100

80

CAPACITIVE LOADING (pF)

1000

100

SHADED AREA INDICATES

STABLE OPERATION

WITH NO NEED FOR

ISOLATION RESISTOR.

NOTE: USING AN ISOLATION RESISTOR REDUCES PEAKING.

Figure 6. Isolation Resistance vs. Capacitive Loading to

Minimize Peaking (<2dB)

25

20

0

10

10,000

15

5

10

CAPACITIVE LOAD (pF)

1000

100

SHADED AREA INDICATES

STABLE OPERATION

WITH NO NEED FOR

ISOLATION RESISTOR.

Figure 7. Peaking vs. Capacitive Load

4.5

3.5

4.0

0

10

10,000

2.0

3.0

2.5

1.0

0.5

1.5

CAPACITIVE LOAD (pF)

1000

100

SHADED AREA INDICATES

STABLE OPERATION

WITH NO NEED FOR

ISOLATION RESISTOR.

Figure 8. MAX4250–MAX4254 Unity-Gain Bandwidth vs.

Capacitive Load

Ordering Information (continued)

___________________Chip Information

—

8 µMAX

8 SO

-40°C to +85°C

-40°C to +85°C

—

MAX4257EUA

MAX4257ESA

—

8 µMAX

8 SO

-40°C to +85°C

-40°C to +85°C

—

MAX4256EUA

MAX4256ESA

ACCJ

5 SOT23-5

-40°C to +85°C

MAX4255EUK-T

—

14 SO

14 SO

-40°C to +85°C

-40°C to +85°C

—

MAX4254ESD

MAX4253ESD

—

10 µMAX

8 µMAX

-40°C to +85°C

-40°C to +85°C

—

MAX4253EUB

MAX4252EUA

—

8 SO

8 µMAX

-40°C to +85°C

-40°C to +85°C

—

MAX4252ESA

MAX4251EUA

—

8 SO

PIN-

PACKAGE

TEMP. RANGE

-40°C to +85°C

SOT

TOP MARK

MAX4251ESA

PART