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LM1117-ADJE3 Datasheet(PDF) 4 Page - Cystech Electonics Corp. |
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LM1117-ADJE3 Datasheet(HTML) 4 Page - Cystech Electonics Corp. |
4 / 7 page CYStech Electronics Corp. Spec. No. : C506E3 Issued Date : 2014.05.07 Revised Date : 2015.05.13 Page No. : 4/7 LM1117E3 series CYStek Product Specification Thermal Regulation All version TA=25℃, 30ms pulse - 0.008 0.04 %/W Ripple Rejection All version f=120Hz, VIN=VOUT+3V, IO= 1A, COUT=25μF tantalum 60 70 - dB Temperature Stability All version IO= 10mA - 0.5 - % Thermal Resistance, Junction to Ambient (No heat sink, no air flow) All version - 62.5 - ℃/W Thermal Resistance, Junction to Case All version Control Circuitry/ Power transistor - 0.65/2.7 - ℃/W Note : 1.See thermal regulation specifications for changes in output voltage due to heating effects. Line and load regulation are measured at a constant junction temperature by low duty cycle pulse testing. Load regulation is measured at the output lead 1/18” from the package. 2. Line and load regulation are guaranteed up to the maximum power dissipation of 15W. Power dissipation is determined by the difference in input and output and the output current. Guaranteed maximum power dissipation will not be available over the full input/output range. |
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