REVISION H 09/29/14

11

8-O/P 1.8V PCIE GEN 1-2-3 CLOCK GENERATOR

9FGV0831 DATASHEET

SMBus Table: Output Enable Register

1

Byte 0

Name

Control Function

Type

0

1

Default

Bit 7

DIF OE7

Output Enable

RW

Low/Low

Enabled

1

Bit 6

DIF OE6

Output Enable

RW

Low/Low

Enabled

1

Bit 5

DIF OE5

Output Enable

RW

Low/Low

Enabled

1

Bit 4

DIF OE4

Output Enable

RW

Low/Low

Enabled

1

Bit 3

DIF OE3

Output Enable

RW

Low/Low

Enabled

1

Bit 2

DIF OE2

Output Enable

RW

Low/Low

Enabled

1

Bit 1

DIF OE1

Output Enable

RW

Low/Low

Enabled

1

Bit 0

DIF OE0

Output Enable

RW

Low/Low

Enabled

1

1. A low on these bits will overide the OE# pin and force the differential output Low/Low

SMBus Table: SS Readback and Control Register

Byte 1

Name

Control Function

Type

0

1

Default

Bit 7

SSENRB1

SS Enable Readback Bit1

R

Latch

Bit 6

SSENRB1

SS Enable Readback Bit0

R

Latch

Bit 5

SSEN_SWCNTRL

Enable SW control of SS

RW

Values in B1[7:6]

control SS amount

Values in B1[4:3]

control SS amount.

0

Bit 4

SSENSW1

SS Enable Software Ctl Bit1

0

Bit 3

SSENSW0

SS Enable Software Ctl Bit0

0

Bit 2

1

Bit 1

AMPLITUDE 1

RW

00 = 0.6V

01 = 0.7V

1

Bit 0

AMPLITUDE 0

RW

10= 0.8V

11 = 0.9V

0

1. B1[5] must be set to a 1 for these bits to have any effect on the part.

SMBus Table: DIF Slew Rate Control Register

Byte 2

Name

Control Function

Type

0

1

Default

Bit 7

SLEWRATESEL DIF7

Adjust Slew Rate of DIF7

RW

Slow Setting

Fast Setting

1

Bit 6

SLEWRATESEL DIF6

Adjust Slew Rate of DIF6

RW

Slow Setting

Fast Setting

1

Bit 5

SLEWRATESEL DIF5

Adjust Slew Rate of DIF5

RW

Slow Setting

Fast Setting

1

Bit 4

SLEWRATESEL DIF4

Adjust Slew Rate of DIF4

RW

Slow Setting

Fast Setting

1

Bit 3

SLEWRATESEL DIF3

Adjust Slew Rate of DIF3

RW

Slow Setting

Fast Setting

1

Bit 2

SLEWRATESEL DIF2

Adjust Slew Rate of DIF2

RW

Slow Setting

Fast Setting

1

Bit 1

SLEWRATESEL DIF1

Adjust Slew Rate of DIF1

RW

Slow Setting

Fast Setting

1

Bit 0

SLEWRATESEL DIF0

Adjust Slew Rate of DIF0

RW

Slow Setting

Fast Setting

1

SMBus Table: Nominal Vhigh Amplitude Control/ REF Control Register

Byte 3

Name

Control Function

Type

0

1

Default

Bit 7

RW

00 = Slowest

01 = Slow

0

Bit 6

RW

10 = Fast

11 = Faster

1

Bit 5

REF Power Down Function

Wake-on-Lan Enable for REF

RW

REF does not run in

Power Down

REF runs in Power

Down

0

Bit 4

REF OE

REF Output Enable

RW

Low

Enabled

1

Bit 3

1

Bit 2

1

Bit 1

1

Bit 0

1

Byte 4 is Reserved

00' for SS_EN_tri = 0, '01' for SS_EN_tri

= 'M', '11 for SS_EN_tri = '1'

00' = SS Off, '01' = -0.25% SS,

'10' = Reserved, '11'= -0.5% SS

Reserved

Controls Output Amplitude

Reserved

Reserved

Reserved

Reserved

REF

Slew Rate Control