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8T49N286 Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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8T49N286 Datasheet(HTML) 2 Page - Integrated Circuit Systems |
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2 / 78 page  8T49N286 DATA SHEET FEMTOCLOCK® NG OCTAL UNIVERSAL FREQUENCY TRANSLATOR 2 REVISION 5 07/08/15 8T49N286 Block Diagram IntN Output Divider IntN Output Divider FracN Output Divider FracN Output Divider Fractional Feedback APLL 0 Fractional Feedback APLL 1 Input Clock Monitoring, Priority, & Selection Status Registers Control Registers GPIO Logic Lock 0 Holdover 0 Lock 1 Holdover 1 OSC XTAL ÷ P0 CLK0 OTP I2C Master I2C/ SPI Slave Reset Logic SCLK/SCLK SDATA/SDO Serial (I2C) EEPROM LOS Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 ÷ P1 CLK1 ÷ P2 CLK2 ÷ P3 CLK3 nINT nRST IntN IntN IntN IntN nWP S_A0/nCS, S_A1/SDI PLL_BYP GPIO 8 Figure 1. 8T49N286 Functional Block Diagram |
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