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MAX3265EUE Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX3265EUE Datasheet(HTML) 11 Page - Maxim Integrated Products |
11 / 17 page +3.0V to +5.5V, 1.25Gbps/2.5Gbps Limiting Amplifiers ______________________________________________________________________________________ 11 Input Buffer The input buffer is designed to accept input signals from the MAX3266/MAX3267 transimpedance ampli- fiers. The input buffer provides a 100 Ω input imped- ance between IN+ and IN-. Input VSWR is typically less than 2.0 for frequencies less than 2GHz. DC-coupling the inputs is not recommended; this prevents the DC offset-correction circuitry from functioning properly. Gain Stage and Offset Correction The limiting amplifier provides approximately 55dB (MAX3264/MAX3268/MAX3768) or 49dB (MAX3265/ MAX3269/MAX3765) of gain. This large gain makes the amplifier susceptible to small DC offsets in the input sig- nal. DC offsets as low as 1mV reduce the accuracy of the power-detection circuit and may cause deterministic jitter. A low-frequency feedback loop is integrated into the limiting amplifier to reduce input offset, typically to less than 100µV. An external capacitor connected between CAZ1 and CAZ2, in parallel with internal capacitance, determines the time constant of the offset-correction circuit. The off- set-correction circuit requires an average data-input mark density of 50% to prevent an increase in duty- cycle distortion and to ensure low deterministic jitter. CML Output Buffer The MAX3264/MAX3265/MAX3765 CML output circuits (Figure 7) provide high tolerance to impedance mis- matches and inductive connectors. The output current can be set to two levels. When the LEVEL pin is left unconnected, output current is approximately 16mA. Connecting LEVEL to ground sets the output current to approximately 20mA. The squelch function is enabled when the SQUELCH pin is set to a TTL-high level or connected to VCC. The squelch function holds OUT+ and OUT- at a static volt- age whenever the input signal power drops below the loss-of-signal threshold. In the 10-pin µMAX package of the MAX3265/MAX3268/MAX3269, the SQUELCH func- tion is left internally unconnected. In the MAX3765/ MAX3768, the SQUELCH function is always enabled by internally connecting it to VCC. SQUELCH operation for the MAX3264/MAX3265 is described in Table 1. Internal Input/Output Schematics IN+ IN- 110 Ω GND ESD STRUCTURES VCC 500 Ω 500 Ω 0.25pF 0.25pF Figure 4. Input Circuit GND RT = 8k Ω (MAX3265/MAX3269/MAX3765) RT = 16k Ω (MAX3264/MAX3268/MAX3768) ESD STRUCTURE VCC LOS RT Figure 5. LOS Output Circuit Table 1. LEVEL PIN VOLTAGE WHEN SQUELCHED OUT- OUT+ Open VCC - 100mV VCC GND VCC - 100mV VCC - 100mV |
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